Makefile: use $^ to avoid listing prerequisites on the command line
There's no need to list again the prerequisites. Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com> Signed-off-by: Junio C Hamano <gitster@pobox.com>
Felipe Contreras committed
Jun 8, 2013 at 17:38 UTC
21117bfeac37d6000e2d8c0b69a146ff3717f961
1 file changed
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Makefile
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@@ -2043,13 +2043,13 @@ $(REMOTE_CURL_PRIMARY): remote-curl.o http.o http-walker.o GIT-LDFLAGS $(GITLIBS
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$(LIBS) $(CURL_LIBCURL) $(EXPAT_LIBEXPAT)
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$(LIB_FILE): $(LIB_OBJS)
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- $(QUIET_AR)$(RM) $@ && $(AR) rcs $@ $(LIB_OBJS)
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+ $(QUIET_AR)$(RM) $@ && $(AR) rcs $@ $^
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$(XDIFF_LIB): $(XDIFF_OBJS)
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- $(QUIET_AR)$(RM) $@ && $(AR) rcs $@ $(XDIFF_OBJS)
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+ $(QUIET_AR)$(RM) $@ && $(AR) rcs $@ $^
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$(VCSSVN_LIB): $(VCSSVN_OBJS)
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- $(QUIET_AR)$(RM) $@ && $(AR) rcs $@ $(VCSSVN_OBJS)
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+ $(QUIET_AR)$(RM) $@ && $(AR) rcs $@ $^
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export DEFAULT_EDITOR DEFAULT_PAGER
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