@samitouri / QOSamiQemu / commits / 017935e080

hw/arm/xilinx_zynq: Split xilinx_zynq into header and implementation files

Create xilinx_zynq.h header file to expose ZynqMachineState and related definitions for machine inheritance. This enables creation of derived machines based on the Zynq platform. Signed-off-by: YannickV <Y.Vossen@beckhoff.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20260518073401.11279-11-corvin.koehne@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

YannickV committed May 18, 2026 at 09:33 UTC 017935e080ca01e83aac7730a1ad14c3ef58b169
2 files changed +31 -12
hw/arm/xilinx_zynq.c
+1 -12
@@ -41,9 +41,7 @@
41 #include "exec/tswap.h"
42 #include "target/arm/cpu-qom.h"
43 #include "qapi/visitor.h"
44 -
45 -#define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9")
46 -OBJECT_DECLARE_SIMPLE_TYPE(ZynqMachineState, ZYNQ_MACHINE)
44 +#include "hw/arm/xilinx_zynq.h"
45
46 /* board base frequency: 33.333333 MHz */
47 #define PS_CLK_FREQUENCY (100 * 1000 * 1000 / 3)
@@ -87,15 +85,6 @@ static const int dma_irqs[8] = {
85 0xe3401000 + ARMV7_IMM16(extract32((val), 16, 16)), /* movt r1 ... */ \
86 0xe5801000 + (addr)
87
90 -#define ZYNQ_MAX_CPUS 2
91 -
92 -struct ZynqMachineState {
93 - MachineState parent;
94 - Clock *ps_clk;
95 - ARMCPU *cpu[ZYNQ_MAX_CPUS];
96 - uint8_t boot_mode;
97 -};
98 -
88 static void zynq_write_board_setup(ARMCPU *cpu,
89 const struct arm_boot_info *info)
90 {
include/hw/arm/xilinx_zynq.h new
+30
@@ -0,0 +1,30 @@
1 +/*
2 + * Xilinx Zynq Baseboard System emulation.
3 + *
4 + * Copyright (c) 2010 Xilinx.
5 + * Copyright (c) 2012 Peter A.G. Crosthwaite (peter.croshtwaite@petalogix.com)
6 + * Copyright (c) 2012 Petalogix Pty Ltd.
7 + * Written by Haibing Ma
8 + *
9 + * SPDX-License-Identifier: GPL-2.0-or-later
10 + */
11 +
12 +#ifndef QEMU_ARM_ZYNQ_H
13 +#define QEMU_ARM_ZYNQ_H
14 +
15 +#include "target/arm/cpu-qom.h"
16 +#include "hw/core/qdev-clock.h"
17 +
18 +#define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9")
19 +OBJECT_DECLARE_SIMPLE_TYPE(ZynqMachineState, ZYNQ_MACHINE)
20 +
21 +#define ZYNQ_MAX_CPUS 2
22 +
23 +struct ZynqMachineState {
24 + MachineState parent;
25 + Clock *ps_clk;
26 + ARMCPU *cpu[ZYNQ_MAX_CPUS];
27 + uint8_t boot_mode;
28 +};
29 +
30 +#endif /* QEMU_ARM_ZYNQ_H */