@samitouri / QOSamiQemu / commits / 024c539a62

hw/arm/armsse.c: fix SSE-300 PPU addresses

The SSE-300 CPU0_PPU, MGMT_PPU, DEBUG_PPU had the wrong addresses that were the same as the SSE-200 addresses. Page 146 of the SSE-300 TRM defines the addresses of the PPUs. SSE-300 TRM: https://support.arm.com/documentation/101773/latest/ Fixes: 8901bb414a24 ("hw/arm/armsse: Add SSE-300 support") Signed-off-by: Simon Xu <simonxhy0404@gmail.com> Message-id: 20260805191257.11303-3-simonxhy0404@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Simon Xu committed Aug 11, 2026 at 20:14 UTC 024c539a625c4cb15bc5e2f50b4a91672eef3f77
1 file changed +3 -3
hw/arm/armsse.c
+3 -3
@@ -452,7 +452,7 @@ static const ARMSSEDeviceInfo sse300_devices[] = {
452 .name = "CPU0CORE_PPU",
453 .type = TYPE_UNIMPLEMENTED_DEVICE,
454 .index = 2,
455 - .addr = 0x50023000,
455 + .addr = 0x58023000,
456 .size = 0x1000,
457 .ppc = NO_PPC,
458 .irq = NO_IRQ,
@@ -461,7 +461,7 @@ static const ARMSSEDeviceInfo sse300_devices[] = {
461 .name = "MGMT_PPU",
462 .type = TYPE_UNIMPLEMENTED_DEVICE,
463 .index = 3,
464 - .addr = 0x50028000,
464 + .addr = 0x58028000,
465 .size = 0x1000,
466 .ppc = NO_PPC,
467 .irq = NO_IRQ,
@@ -470,7 +470,7 @@ static const ARMSSEDeviceInfo sse300_devices[] = {
470 .name = "DEBUG_PPU",
471 .type = TYPE_UNIMPLEMENTED_DEVICE,
472 .index = 4,
473 - .addr = 0x50029000,
473 + .addr = 0x58029000,
474 .size = 0x1000,
475 .ppc = NO_PPC,
476 .irq = NO_IRQ,