@samitouri / QOSamiQemu / commits / 044f74f301

target/ppc: Move vector pack instructions to decodetree

Move below instructions to decodetree specification: vpkuhum, vpkuwum, vpkuhus, vpkuwus : VX-form (PPC_ALTIVEC) vpkshus, vpkswus, vpkshss, vpkswss : VX-form (PPC_ALTIVEC) vpkpx : VX-form (PPC_ALTIVEC) vpkudum, vpkudus, vpksdus, vpksdss : VX-form (PPC2_ALTIVEC_207) The legacy GEN_VXFORM_ENV/GEN_VXFORM macros that generated gen_vpk*() functions reading register fields from ctx->opcode are replaced by new do_vpk_env()/do_vpk() helpers in vmx-impl.c.inc that use the pre-extracted decodetree argument fields (a->vrt, a->vra, a->vrb) directly. The existing gen_helper_vpk*() implementations in int_helper.c are reused without changes. The changes were verified by validating that the tcg ops generated by those instructions remain the same, which were captured with the '-d in_asm,op' option before and after the patch. Signed-off-by: Aboorva Devarajan <aboorvad@linux.ibm.com> Reviewed-by: Nikhil Kumar Singh <nikhilks@linux.ibm.com> Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Reviewed-by: Amit Machhiwal <amachhiw@linux.ibm.com> Signed-off-by: Chinmay Rath <rathc@linux.ibm.com> Tested-by: Aniket Sahu <asahu1x@linux.ibm.com> Link: https://lore.kernel.org/qemu-devel/20260827133010.278889-6-rathc@linux.ibm.com Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>

Aboorva Devarajan committed Aug 27, 2026 at 18:59 UTC 044f74f3015bef1beaa612528378a2992d40f160
5 files changed +81 -53
target/ppc/helper.h
+13 -13
@@ -249,19 +249,19 @@ DEF_HELPER_FLAGS_4(VMSUMUBM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
249 DEF_HELPER_FLAGS_4(VMSUMMBM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
250 DEF_HELPER_FLAGS_4(VPERM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
251 DEF_HELPER_FLAGS_4(VPERMR, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
252 -DEF_HELPER_4(vpkshss, void, env, avr, avr, avr)
253 -DEF_HELPER_4(vpkshus, void, env, avr, avr, avr)
254 -DEF_HELPER_4(vpkswss, void, env, avr, avr, avr)
255 -DEF_HELPER_4(vpkswus, void, env, avr, avr, avr)
256 -DEF_HELPER_4(vpksdss, void, env, avr, avr, avr)
257 -DEF_HELPER_4(vpksdus, void, env, avr, avr, avr)
258 -DEF_HELPER_4(vpkuhus, void, env, avr, avr, avr)
259 -DEF_HELPER_4(vpkuwus, void, env, avr, avr, avr)
260 -DEF_HELPER_4(vpkudus, void, env, avr, avr, avr)
261 -DEF_HELPER_4(vpkuhum, void, env, avr, avr, avr)
262 -DEF_HELPER_4(vpkuwum, void, env, avr, avr, avr)
263 -DEF_HELPER_4(vpkudum, void, env, avr, avr, avr)
264 -DEF_HELPER_FLAGS_3(vpkpx, TCG_CALL_NO_RWG, void, avr, avr, avr)
252 +DEF_HELPER_4(VPKSHSS, void, env, avr, avr, avr)
253 +DEF_HELPER_4(VPKSHUS, void, env, avr, avr, avr)
254 +DEF_HELPER_4(VPKSWSS, void, env, avr, avr, avr)
255 +DEF_HELPER_4(VPKSWUS, void, env, avr, avr, avr)
256 +DEF_HELPER_4(VPKSDSS, void, env, avr, avr, avr)
257 +DEF_HELPER_4(VPKSDUS, void, env, avr, avr, avr)
258 +DEF_HELPER_4(VPKUHUS, void, env, avr, avr, avr)
259 +DEF_HELPER_4(VPKUWUS, void, env, avr, avr, avr)
260 +DEF_HELPER_4(VPKUDUS, void, env, avr, avr, avr)
261 +DEF_HELPER_4(VPKUHUM, void, env, avr, avr, avr)
262 +DEF_HELPER_4(VPKUWUM, void, env, avr, avr, avr)
263 +DEF_HELPER_4(VPKUDUM, void, env, avr, avr, avr)
264 +DEF_HELPER_FLAGS_3(VPKPX, TCG_CALL_NO_RWG, void, avr, avr, avr)
265 DEF_HELPER_5(VMHADDSHS, void, env, avr, avr, avr, avr)
266 DEF_HELPER_5(VMHRADDSHS, void, env, avr, avr, avr, avr)
267 DEF_HELPER_FLAGS_4(VMSUMUHM, TCG_CALL_NO_RWG, void, avr, avr, avr, avr)
target/ppc/insn32.decode
+16
@@ -1054,6 +1054,22 @@ VSTRIHR 000100 ..... 00011 ..... . 0000001101 @VX_tb_rc
1054 VCLRLB 000100 ..... ..... ..... 00110001101 @VX
1055 VCLRRB 000100 ..... ..... ..... 00111001101 @VX
1056
1057 +## Vector Pack Instructions
1058 +
1059 +VPKUHUM 000100 ..... ..... ..... 0000000111 0 @VX
1060 +VPKUWUM 000100 ..... ..... ..... 0000100111 0 @VX
1061 +VPKUDUM 000100 ..... ..... ..... 1000100111 0 @VX
1062 +VPKUHUS 000100 ..... ..... ..... 0001000111 0 @VX
1063 +VPKUWUS 000100 ..... ..... ..... 0001100111 0 @VX
1064 +VPKUDUS 000100 ..... ..... ..... 1001100111 0 @VX
1065 +VPKSHUS 000100 ..... ..... ..... 0010000111 0 @VX
1066 +VPKSWUS 000100 ..... ..... ..... 0010100111 0 @VX
1067 +VPKSDUS 000100 ..... ..... ..... 1010100111 0 @VX
1068 +VPKSHSS 000100 ..... ..... ..... 0011000111 0 @VX
1069 +VPKSWSS 000100 ..... ..... ..... 0011100111 0 @VX
1070 +VPKSDSS 000100 ..... ..... ..... 1011100111 0 @VX
1071 +VPKPX 000100 ..... ..... ..... 0110000111 0 @VX
1072 +
1073 # VSX Load/Store Instructions
1074
1075 LXSD 111001 ..... ..... .............. 10 @DS
target/ppc/int_helper.c
+14 -14
@@ -1465,7 +1465,7 @@ void helper_VPMSUMD(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1465 #else
1466 #define PKBIG 0
1467 #endif
1468 -void helper_vpkpx(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1468 +void helper_VPKPX(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1469 {
1470 int i, j;
1471 ppc_avr_t result;
@@ -1488,7 +1488,7 @@ void helper_vpkpx(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1488 }
1489
1490 #define VPK(suffix, from, to, cvt, dosat) \
1491 - void helper_vpk##suffix(CPUPPCState *env, ppc_avr_t *r, \
1491 + void helper_VPK##suffix(CPUPPCState *env, ppc_avr_t *r, \
1492 ppc_avr_t *a, ppc_avr_t *b) \
1493 { \
1494 int i; \
@@ -1507,18 +1507,18 @@ void helper_vpkpx(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1507 } \
1508 }
1509 #define I(x, y) (x)
1510 -VPK(shss, s16, s8, cvtshsb, 1)
1511 -VPK(shus, s16, u8, cvtshub, 1)
1512 -VPK(swss, s32, s16, cvtswsh, 1)
1513 -VPK(swus, s32, u16, cvtswuh, 1)
1514 -VPK(sdss, s64, s32, cvtsdsw, 1)
1515 -VPK(sdus, s64, u32, cvtsduw, 1)
1516 -VPK(uhus, u16, u8, cvtuhub, 1)
1517 -VPK(uwus, u32, u16, cvtuwuh, 1)
1518 -VPK(udus, u64, u32, cvtuduw, 1)
1519 -VPK(uhum, u16, u8, I, 0)
1520 -VPK(uwum, u32, u16, I, 0)
1521 -VPK(udum, u64, u32, I, 0)
1510 +VPK(SHSS, s16, s8, cvtshsb, 1)
1511 +VPK(SHUS, s16, u8, cvtshub, 1)
1512 +VPK(SWSS, s32, s16, cvtswsh, 1)
1513 +VPK(SWUS, s32, u16, cvtswuh, 1)
1514 +VPK(SDSS, s64, s32, cvtsdsw, 1)
1515 +VPK(SDUS, s64, u32, cvtsduw, 1)
1516 +VPK(UHUS, u16, u8, cvtuhub, 1)
1517 +VPK(UWUS, u32, u16, cvtuwuh, 1)
1518 +VPK(UDUS, u64, u32, cvtuduw, 1)
1519 +VPK(UHUM, u16, u8, I, 0)
1520 +VPK(UWUM, u32, u16, I, 0)
1521 +VPK(UDUM, u64, u32, I, 0)
1522 #undef I
1523 #undef VPK
1524 #undef PKBIG
target/ppc/translate/vmx-impl.c.inc
+38 -13
@@ -1070,19 +1070,44 @@ TRANS(VRLQMI, do_vector_rotl_quad, false, true)
1070
1071 GEN_VXFORM_TRANS(vsl, 2, 7);
1072 GEN_VXFORM_TRANS(vsr, 2, 11);
1073 -GEN_VXFORM_ENV(vpkuhum, 7, 0);
1074 -GEN_VXFORM_ENV(vpkuwum, 7, 1);
1075 -GEN_VXFORM_ENV(vpkudum, 7, 17);
1076 -GEN_VXFORM_ENV(vpkuhus, 7, 2);
1077 -GEN_VXFORM_ENV(vpkuwus, 7, 3);
1078 -GEN_VXFORM_ENV(vpkudus, 7, 19);
1079 -GEN_VXFORM_ENV(vpkshus, 7, 4);
1080 -GEN_VXFORM_ENV(vpkswus, 7, 5);
1081 -GEN_VXFORM_ENV(vpksdus, 7, 21);
1082 -GEN_VXFORM_ENV(vpkshss, 7, 6);
1083 -GEN_VXFORM_ENV(vpkswss, 7, 7);
1084 -GEN_VXFORM_ENV(vpksdss, 7, 23);
1085 -GEN_VXFORM(vpkpx, 7, 12);
1073 +static bool do_vpk_env(DisasContext *ctx, arg_VX *a,
1074 + void (*gen_helper)(TCGv_ptr, TCGv_ptr,
1075 + TCGv_ptr, TCGv_ptr))
1076 +{
1077 + TCGv_ptr ra, rb, rd;
1078 + REQUIRE_VECTOR(ctx);
1079 + ra = gen_avr_ptr(a->vra);
1080 + rb = gen_avr_ptr(a->vrb);
1081 + rd = gen_avr_ptr(a->vrt);
1082 + gen_helper(tcg_env, rd, ra, rb);
1083 + return true;
1084 +}
1085 +
1086 +static bool do_vpk(DisasContext *ctx, arg_VX *a,
1087 + void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_ptr))
1088 +{
1089 + TCGv_ptr ra, rb, rd;
1090 + REQUIRE_VECTOR(ctx);
1091 + ra = gen_avr_ptr(a->vra);
1092 + rb = gen_avr_ptr(a->vrb);
1093 + rd = gen_avr_ptr(a->vrt);
1094 + gen_helper(rd, ra, rb);
1095 + return true;
1096 +}
1097 +
1098 +TRANS_FLAGS(ALTIVEC, VPKUHUM, do_vpk_env, gen_helper_VPKUHUM)
1099 +TRANS_FLAGS(ALTIVEC, VPKUWUM, do_vpk_env, gen_helper_VPKUWUM)
1100 +TRANS_FLAGS2(ALTIVEC_207, VPKUDUM, do_vpk_env, gen_helper_VPKUDUM)
1101 +TRANS_FLAGS(ALTIVEC, VPKUHUS, do_vpk_env, gen_helper_VPKUHUS)
1102 +TRANS_FLAGS(ALTIVEC, VPKUWUS, do_vpk_env, gen_helper_VPKUWUS)
1103 +TRANS_FLAGS2(ALTIVEC_207, VPKUDUS, do_vpk_env, gen_helper_VPKUDUS)
1104 +TRANS_FLAGS(ALTIVEC, VPKSHUS, do_vpk_env, gen_helper_VPKSHUS)
1105 +TRANS_FLAGS(ALTIVEC, VPKSWUS, do_vpk_env, gen_helper_VPKSWUS)
1106 +TRANS_FLAGS2(ALTIVEC_207, VPKSDUS, do_vpk_env, gen_helper_VPKSDUS)
1107 +TRANS_FLAGS(ALTIVEC, VPKSHSS, do_vpk_env, gen_helper_VPKSHSS)
1108 +TRANS_FLAGS(ALTIVEC, VPKSWSS, do_vpk_env, gen_helper_VPKSWSS)
1109 +TRANS_FLAGS2(ALTIVEC_207, VPKSDSS, do_vpk_env, gen_helper_VPKSDSS)
1110 +TRANS_FLAGS(ALTIVEC, VPKPX, do_vpk, gen_helper_VPKPX)
1111 GEN_VXFORM_ENV(vsum4ubs, 4, 24);
1112 GEN_VXFORM_ENV(vsum4sbs, 4, 28);
1113 GEN_VXFORM_ENV(vsum4shs, 4, 25);
target/ppc/translate/vmx-ops.c.inc
-13
@@ -59,19 +59,6 @@ GEN_VXFORM_300(bcdtrunc, 0, 20),
59 GEN_VXFORM_300(bcdutrunc, 0, 21),
60 GEN_VXFORM(vsl, 2, 7),
61 GEN_VXFORM(vsr, 2, 11),
62 -GEN_VXFORM(vpkuhum, 7, 0),
63 -GEN_VXFORM(vpkuwum, 7, 1),
64 -GEN_VXFORM_207(vpkudum, 7, 17),
65 -GEN_VXFORM(vpkuhus, 7, 2),
66 -GEN_VXFORM(vpkuwus, 7, 3),
67 -GEN_VXFORM_207(vpkudus, 7, 19),
68 -GEN_VXFORM(vpkshus, 7, 4),
69 -GEN_VXFORM(vpkswus, 7, 5),
70 -GEN_VXFORM_207(vpksdus, 7, 21),
71 -GEN_VXFORM(vpkshss, 7, 6),
72 -GEN_VXFORM(vpkswss, 7, 7),
73 -GEN_VXFORM_207(vpksdss, 7, 23),
74 -GEN_VXFORM(vpkpx, 7, 12),
62 GEN_VXFORM(vsum4ubs, 4, 24),
63 GEN_VXFORM(vsum4sbs, 4, 28),
64 GEN_VXFORM(vsum4shs, 4, 25),