@samitouri / QOSamiQemu / commits / 08557a089e

hw/arm/msf2-som: Fix spansion-cr2nv value for S25FL128S

The emcraft-sf2 board set spansion-cr2nv to 1, which the old m25p80 code treated as a byte count. With the dummy cycle to byte conversion fix, CR2V=1 at SPI x1 is 1 bit, not byte-aligned, and triggers an assertion. Use the S25FL128S default of 0x8 (8 cycles = 1 byte at SPI x1), preserving the same runtime behavior. Signed-off-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Bin Meng <bin.meng@processmission.com> Tested-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Message-Id: <20d58663-a8d1-41ff-9348-cae4982c30f0@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>

Cédric Le Goater committed Jul 7, 2026 at 16:23 UTC 08557a089e2140ae350b825b2ae9ac9c4eddb154
1 file changed +1 -1
hw/arm/msf2-som.c
+1 -1
@@ -84,7 +84,7 @@ static void emcraft_sf2_s2s010_init(MachineState *machine)
84 /* Attach SPI flash to SPI0 controller */
85 spi_bus = qdev_get_child_bus(dev, "spi0");
86 spi_flash = qdev_new("s25sl12801"); /* Spansion S25FL128SDPBHICO */
87 - qdev_prop_set_uint8(spi_flash, "spansion-cr2nv", 1);
87 + qdev_prop_set_uint8(spi_flash, "spansion-cr2nv", 0x8);
88 if (dinfo) {
89 qdev_prop_set_drive_err(spi_flash, "drive",
90 blk_by_legacy_dinfo(dinfo), &error_fatal);