@samitouri / QOSamiQemu / commits / 0a3283513f

target/hppa: Always map 64-bit firmware at 0xfffffff0f0000000

I checked on a physical A500, C3700 and C8000 machine and all load their 64-bit PDC (Firmware) at 0xfffffff0f0000000, independed if the CPU uses 40 or 44 physical address bits. For qemu we will do the same and load the 64-bit SeaBIOS-hppa at the same address for our emulated machines. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Anton Johansson <anjo@rev.ng>

Helge Deller committed Mar 13, 2026 at 19:43 UTC 0a3283513f622b21784486aea922737b88faea5c
1 file changed +6 -4
target/hppa/mem_helper.c
+6 -4
@@ -27,6 +27,7 @@
27 #include "exec/target_page.h"
28 #include "exec/helper-proto.h"
29 #include "hw/core/cpu.h"
30 +#include "hw/hppa/hppa_hardware.h"
31 #include "trace.h"
32
33 hwaddr hppa_abs_to_phys_pa1x(uint8_t phys_addr_bits, vaddr addr)
@@ -66,12 +67,13 @@ hwaddr hppa_abs_to_phys_pa2_w0(uint8_t phys_addr_bits, vaddr addr)
67 /*
68 * PDC address space:
69 * Figures H-10 and H-11 of the parisc2.0 spec do not specify
69 - * where to map into the 64-bit PDC address space.
70 - * We map with an offset which equals the 32-bit address, which
71 - * is what can be seen on physical machines too.
70 + * where to map into the 64-bit PDC address space, but verification
71 + * on physical A500, C3700 and C8000 machines show that PDC is always
72 + * mapped at 0xfffffff0f0000000, independed if the CPU has 40 or 44
73 + * physical bits.
74 */
75 addr = (uint32_t)addr;
74 - addr |= -1ull << (phys_addr_bits - 4);
76 + addr |= ((uint64_t) FIRMWARE_HIGH) << 32;
77 }
78 return addr;
79 }