@samitouri / QOSamiQemu / commits / 0b0364b473

target/arm: Enable FADD/FSUB (half-precision) with FEAT_SME_F8F16

These two instructions can be enabled with either FEAT_SME_F8F16 or FEAT_SME_F16F16. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> [PMM: fix && vs || mixup in feature function] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20260625015159.719300-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Richard Henderson committed Jun 24, 2026 at 18:51 UTC 0b0364b4735d7f16539ba4e4949ddfa3593dbf2b
2 files changed +13 -2
target/arm/cpu-features.h
+11
@@ -1610,6 +1610,11 @@ static inline bool isar_feature_aa64_sme_f8f32(const ARMISARegisters *id)
1610 return FIELD_EX64_IDREG(id, ID_AA64SMFR0, F8F32);
1611 }
1612
1613 +static inline bool isar_feature_aa64_sme_f8f16(const ARMISARegisters *id)
1614 +{
1615 + return FIELD_EX64_IDREG(id, ID_AA64SMFR0, F8F16);
1616 +}
1617 +
1618 static inline bool isar_feature_aa64_sme_f16f16(const ARMISARegisters *id)
1619 {
1620 return FIELD_EX64_IDREG(id, ID_AA64SMFR0, F16F16);
@@ -1781,6 +1786,12 @@ isar_feature_aa64_sme2_or_sve2_lut(const ARMISARegisters *id)
1786 return isar_feature_aa64_sme2_or_sve2(id) && isar_feature_aa64_lut(id);
1787 }
1788
1789 +static inline bool
1790 +isar_feature_aa64_sme_f16f16_or_f8f16(const ARMISARegisters *id)
1791 +{
1792 + return isar_feature_aa64_sme_f16f16(id) || isar_feature_aa64_sme_f8f16(id);
1793 +}
1794 +
1795 /*
1796 * Feature tests for "does this exist in either 32-bit or 64-bit?"
1797 */
target/arm/tcg/translate-sme.c
+2 -2
@@ -1335,9 +1335,9 @@ static bool do_faddsub(DisasContext *s, arg_az_n *a, ARMFPStatusFlavour fpst,
1335 return true;
1336 }
1337
1338 -TRANS_FEAT(FADD_nn_h, aa64_sme_f16f16, do_faddsub, a,
1338 +TRANS_FEAT(FADD_nn_h, aa64_sme_f16f16_or_f8f16, do_faddsub, a,
1339 FPST_ZA_F16, gen_helper_gvec_fadd_h)
1340 -TRANS_FEAT(FSUB_nn_h, aa64_sme_f16f16, do_faddsub, a,
1340 +TRANS_FEAT(FSUB_nn_h, aa64_sme_f16f16_or_f8f16, do_faddsub, a,
1341 FPST_ZA_F16, gen_helper_gvec_fsub_h)
1342
1343 TRANS_FEAT(FADD_nn_s, aa64_sme2, do_faddsub, a,