hw/arm: anacapa: add ADC128D818 devices
Wire up the two ADC128D818 instances that appear in the Anacapa DTS: one on i2c8 mux channel 0 and one on i2c13 mux channel 3. Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Emmanuel Blot <emmanuel.blot@free.fr> Link: https://lore.kernel.org/qemu-devel/20260707091609.97759-9-emmanuel.blot@free.fr Signed-off-by: Cédric Le Goater <clg@redhat.com>
Emmanuel Blot committed
Jul 7, 2026 at 11:16 UTC
15d88540b83074807a483b35a7a6744571fcd9cb
2 files changed
+18
-4
hw/arm/Kconfig
+1
@@ -558,6 +558,7 @@ config ASPEED_SOC
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select LED
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select PMBUS
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select MAX31785
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+ select ADC128D818
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select FSI_APB2OPB_ASPEED
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select AT24C
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select PCI_EXPRESS_ASPEED
hw/arm/aspeed_ast2600_anacapa.c
+17
-4
@@ -1,13 +1,14 @@
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/*
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* Facebook Anacapa
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*
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- * Copyright (c) Meta Platforms, Inc. and affiliates.
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+ * Copyright (c) 2026 Meta Platforms, Inc. and affiliates.
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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+#include "hw/sensor/adc128d818.h"
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#include "hw/arm/machines-qom.h"
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#include "hw/arm/aspeed.h"
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#include "hw/arm/aspeed_soc.h"
@@ -15,7 +16,6 @@
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#include "hw/gpio/pca9552.h"
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#include "hw/nvram/eeprom_at24c.h"
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-/* Anacapa hardware value */
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#define ANACAPA_BMC_HW_STRAP1 0x00002002
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#define ANACAPA_BMC_HW_STRAP2 0x00000000
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#define ANACAPA_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)
@@ -221,6 +221,17 @@ static const uint8_t hpm_brd_id_eeprom[] = {
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};
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static const size_t hpm_brd_id_eeprom_len = sizeof(hpm_brd_id_eeprom);
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+static void anacapa_add_adc128d818(I2CBus *bus, uint8_t addr,
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+ const char *description)
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+{
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+ DeviceState *dev = DEVICE(i2c_slave_new(TYPE_ADC128D818, addr));
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+ g_autofree char *childname = g_strdup_printf("0x%02x", addr);
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+
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+ qdev_prop_set_string(dev, "description", description);
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+ object_property_add_child(OBJECT(bus), childname, OBJECT(dev));
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+ i2c_slave_realize_and_unref(I2C_SLAVE(dev), bus, &error_fatal);
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+}
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+
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static void anacapa_bmc_i2c_init(AspeedMachineState *bmc)
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{
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/* Reference: aspeed-bmc-facebook-anacapa.dts */
@@ -259,7 +270,8 @@ static void anacapa_bmc_i2c_init(AspeedMachineState *bmc)
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i2c_mux = i2c_slave_create_simple(i2c[8], TYPE_PCA9546, 0x72);
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/* i2c8mux ch0 */
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- /* adc128d818@1f - no model */
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+ /* adc128d818@1f - R-PDB ADC (mode 1: 8 voltage channels) */
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+ anacapa_add_adc128d818(pca954x_i2c_get_bus(i2c_mux, 0), 0x1f, "i2c8:0:1f");
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/* pca9555@22 */
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i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 0),
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TYPE_PCA9552, 0x22);
@@ -320,7 +332,8 @@ static void anacapa_bmc_i2c_init(AspeedMachineState *bmc)
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i2c_mux = i2c_slave_create_simple(i2c[13], TYPE_PCA9548, 0x70);
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/* i2c13mux ch3 */
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- /* adc128d818@1f - no model */
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+ /* adc128d818@1f - MB ADC (mode 1: 8 voltage channels) */
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+ anacapa_add_adc128d818(pca954x_i2c_get_bus(i2c_mux, 3), 0x1f, "i2c13:3:1f");
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/* i2c13mux ch4 */
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/* eeprom@51 */