@samitouri / QOSamiQemu / commits / 17ae6cc2b9

hw/misc/aspeed_scu: Fix AST2600_RNG definitions

Commit e09cf36321f6 ("hw: aspeed_scu: Add AST2600 support") introduced a typo on the definitions of the Random Number Generator registers. Fix that. The implementation of RNG_CTRL and RNG_DATA should be rechecked on HW since the QEMU implementation always generates random data, regardless of RNG_CTRL. A comment in aspeed_ast2600_scu_read() admits uncertainty about the behavior : /* * On hardware, RNG_DATA works regardless of the state of the * enable bit in RNG_CTRL * * TODO: Check this is true for ast2600 */ Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/2350 Fixes: e09cf36321f6 ("hw: aspeed_scu: Add AST2600 support") Reviewed-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@redhat.com>

Cédric Le Goater committed May 12, 2026 at 22:58 UTC 17ae6cc2b9ff12fd9e8b3b7779d1b6755f0b25f9
1 file changed +2 -2
hw/misc/aspeed_scu.c
+2 -2
@@ -128,8 +128,8 @@
128 #define AST2600_HW_STRAP2 TO_REG(0x510)
129 #define AST2600_HW_STRAP2_CLR TO_REG(0x514)
130 #define AST2600_HW_STRAP2_PROT TO_REG(0x518)
131 -#define AST2600_RNG_CTRL TO_REG(0x524)
132 -#define AST2600_RNG_DATA TO_REG(0x540)
131 +#define AST2600_RNG_CTRL TO_REG(0x520)
132 +#define AST2600_RNG_DATA TO_REG(0x524)
133 #define AST2600_CHIP_ID0 TO_REG(0x5B0)
134 #define AST2600_CHIP_ID1 TO_REG(0x5B4)
135