target/arm: trigger timer recalc on SCR:ECVEN change
Toggling the ECVEN state affects the offset calculated in gt_phys_raw_cnt_offset so we should trigger a re-calculation on its change. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20260624124527.1018912-4-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alex Bennée committed
Jun 24, 2026 at 13:45 UTC
1b6b929d5517e4e85cbf3b18f704dc3c5c58b0a0
1 file changed
+9
target/arm/helper.c
+9
@@ -37,6 +37,9 @@
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#include "qemu/plugin.h"
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static void switch_mode(CPUARMState *env, int mode);
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+#ifndef CONFIG_USER_ONLY
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+static void gt_recalc_timer(ARMCPU *cpu, int timeridx);
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+#endif
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int compare_u64(const void *a, const void *b)
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{
@@ -821,6 +824,12 @@ static void scr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
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changed = env->cp15.scr_el3 ^ value;
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env->cp15.scr_el3 = value;
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+#ifndef CONFIG_USER_ONLY
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+ if (changed & SCR_ECVEN) {
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+ gt_recalc_timer(cpu, GTIMER_PHYS);
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+ }
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+#endif
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+
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/*
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* If SCR_EL3.{NS,NSE} changes, i.e. change of security state,
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* we must invalidate all TLBs below EL3.