target/arm: Enable FEAT_LUT for -cpu max
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260609192110.752384-24-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
Jun 9, 2026 at 12:20 UTC
215ad1fa328bcc7b70eec8509b6a0df01d18657a
3 files changed
+3
docs/system/arm/emulation.rst
+1
@@ -102,6 +102,7 @@ the following architecture extensions:
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- FEAT_LSE (Large System Extensions)
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- FEAT_LSE2 (Large System Extensions v2)
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- FEAT_LSE128 (128-bit Atomics)
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+- FEAT_LUT (Lookup table instructions with 2-bit and 4-bit indices)
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- FEAT_LVA (Large Virtual Address space)
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- FEAT_MEC (Memory Encryption Contexts)
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linux-user/aarch64/elfload.c
+1
@@ -221,6 +221,7 @@ abi_ulong get_elf_hwcap2(CPUState *cs)
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GET_FEATURE_ID(aa64_lse128, ARM_HWCAP2_A64_LSE128);
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GET_FEATURE_ID(aa64_faminmax, ARM_HWCAP2_A64_FAMINMAX);
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GET_FEATURE_ID(aa64_fpmr, ARM_HWCAP2_A64_FPMR);
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+ GET_FEATURE_ID(aa64_lut, ARM_HWCAP2_A64_LUT);
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return hwcaps;
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}
target/arm/tcg/cpu64.c
+1
@@ -1263,6 +1263,7 @@ void aarch64_max_tcg_initfn(Object *obj)
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t = FIELD_DP64(t, ID_AA64ISAR2, BC, 1); /* FEAT_HBC */
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t = FIELD_DP64(t, ID_AA64ISAR2, WFXT, 2); /* FEAT_WFxT */
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t = FIELD_DP64(t, ID_AA64ISAR2, CSSC, 2); /* FEAT_CSSC, FEAT_CMPBR */
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+ t = FIELD_DP64(t, ID_AA64ISAR2, LUT, 1); /* FEAT_LUT */
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t = FIELD_DP64(t, ID_AA64ISAR2, ATS1A, 1); /* FEAT_ATS1A */
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SET_IDREG(isar, ID_AA64ISAR2, t);
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