@samitouri / QOSamiQemu / commits / 21aa81318d

disas/riscv: Reduce rv_insn to uint32_t

Since 758dce9c98a, the only possible values for instruction length are 2 and 4. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20260812223142.349142-3-richard.henderson@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

Richard Henderson committed Aug 12, 2026 at 15:30 UTC 21aa81318d2f8f55f9dcd96aca7ba3eb53844ea0
2 files changed +4 -10
disas/riscv.c
+3 -9
@@ -5491,10 +5491,8 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc, rv_inst inst,
5491 return format_inst(24, &dec);
5492 }
5493
5494 -#define INST_FMT_2 "%04" PRIx64 " "
5495 -#define INST_FMT_4 "%08" PRIx64 " "
5496 -#define INST_FMT_6 "%012" PRIx64 " "
5497 -#define INST_FMT_8 "%016" PRIx64 " "
5494 +#define INST_FMT_2 "%04x "
5495 +#define INST_FMT_4 "%08x "
5496
5497 static int
5498 print_insn_riscv(bfd_vma memaddr, struct disassemble_info *info, rv_isa isa)
@@ -5530,12 +5528,8 @@ print_insn_riscv(bfd_vma memaddr, struct disassemble_info *info, rv_isa isa)
5528 case 4:
5529 (*info->fprintf_func)(info->stream, INST_FMT_4, inst);
5530 break;
5533 - case 6:
5534 - (*info->fprintf_func)(info->stream, INST_FMT_6, inst);
5535 - break;
5531 default:
5537 - (*info->fprintf_func)(info->stream, INST_FMT_8, inst);
5538 - break;
5532 + g_assert_not_reached();
5533 }
5534 }
5535
disas/riscv.h
+1 -1
@@ -11,7 +11,7 @@
11
12 /* types */
13
14 -typedef uint64_t rv_inst;
14 +typedef uint32_t rv_inst;
15 typedef uint16_t rv_opcode;
16
17 /* enums */