disas/riscv: Reduce rv_insn to uint32_t
Since 758dce9c98a, the only possible values for instruction length are 2 and 4. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20260812223142.349142-3-richard.henderson@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Richard Henderson committed
Aug 12, 2026 at 15:30 UTC
21aa81318d2f8f55f9dcd96aca7ba3eb53844ea0
2 files changed
+4
-10
disas/riscv.c
+3
-9
@@ -5491,10 +5491,8 @@ static GString *disasm_inst(rv_isa isa, uint64_t pc, rv_inst inst,
5491
return format_inst(24, &dec);
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}
5493
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-#define INST_FMT_2 "%04" PRIx64 " "
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-#define INST_FMT_4 "%08" PRIx64 " "
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-#define INST_FMT_6 "%012" PRIx64 " "
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-#define INST_FMT_8 "%016" PRIx64 " "
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+#define INST_FMT_2 "%04x "
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+#define INST_FMT_4 "%08x "
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static int
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print_insn_riscv(bfd_vma memaddr, struct disassemble_info *info, rv_isa isa)
@@ -5530,12 +5528,8 @@ print_insn_riscv(bfd_vma memaddr, struct disassemble_info *info, rv_isa isa)
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case 4:
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(*info->fprintf_func)(info->stream, INST_FMT_4, inst);
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break;
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- case 6:
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- (*info->fprintf_func)(info->stream, INST_FMT_6, inst);
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- break;
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default:
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- (*info->fprintf_func)(info->stream, INST_FMT_8, inst);
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- break;
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+ g_assert_not_reached();
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}
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}
5535
disas/riscv.h
+1
-1
@@ -11,7 +11,7 @@
11
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/* types */
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-typedef uint64_t rv_inst;
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+typedef uint32_t rv_inst;
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typedef uint16_t rv_opcode;
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/* enums */