hw/dma/soc_dma: dma bytes is uint64_t
The worst case number of DMA bytes that omap_dma will ask us to transfer is 0xffff * 0xffff * 4 == 0x3fff80004, which is slightly larger than fits into a uint32_t. Move the byte count to uint64_t, and adjust code that passes it around to also use uint64_t. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Jim MacArthur <jim.macarthur@linaro.org> Message-id: 20260710105907.2570621-6-peter.maydell@linaro.org
Peter Maydell committed
Jul 20, 2026 at 19:05 UTC
22afad9489fadb87105d78e8fdaf51e801bef863
2 files changed
+6
-2
hw/dma/soc_dma.c
+5
-1
@@ -49,11 +49,15 @@ struct dma_s {
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struct soc_dma_ch_s ch[];
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};
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-static void soc_dma_ch_schedule(struct soc_dma_ch_s *ch, int delay_bytes)
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+static void soc_dma_ch_schedule(struct soc_dma_ch_s *ch, uint64_t delay_bytes)
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{
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int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
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struct dma_s *dma = (struct dma_s *) ch->dma;
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+ /*
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+ * Worst case delay bytes is only slightly larger than fits into
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+ * a 32-bit integer, so this won't overflow.
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+ */
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timer_mod(ch->timer, now + delay_bytes / dma->channel_freq);
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}
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include/hw/arm/soc_dma.h
+1
-1
@@ -49,7 +49,7 @@ struct soc_dma_ch_s {
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int update;
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/* This should be set by dma->setup_fn(). */
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- int bytes;
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+ uint64_t bytes;
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/* Initialised by the DMA module, call soc_dma_ch_update after writing. */
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enum soc_dma_access_type type[2];
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hwaddr vaddr[2]; /* Updated by .transfer_fn(). */