@samitouri / QOSamiQemu / commits / 2430d49a17

target/arm: Enable FEAT_FPMR for -cpu max

Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260522220306.235200-18-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Richard Henderson committed May 22, 2026 at 15:02 UTC 2430d49a17c99c91e0824e3364e14ebd8547d1a4
3 files changed +6
docs/system/arm/emulation.rst
+1
@@ -77,6 +77,7 @@ the following architecture extensions:
77 - FEAT_FPAC (Faulting on AUT* instructions)
78 - FEAT_FPACCOMBINE (Faulting on combined pointer authentication instructions)
79 - FEAT_FPACC_SPEC (Speculative behavior of combined pointer authentication instructions)
80 +- FEAT_FPMR (Floating-point Mode Register)
81 - FEAT_FRINTTS (Floating-point to integer instructions)
82 - FEAT_FlagM (Flag manipulation instructions v2)
83 - FEAT_FlagM2 (Enhancements to flag manipulation instructions)
linux-user/aarch64/elfload.c
+1
@@ -219,6 +219,7 @@ abi_ulong get_elf_hwcap2(CPUState *cs)
219 GET_FEATURE_ID(aa64_cssc, ARM_HWCAP2_A64_CSSC);
220 GET_FEATURE_ID(aa64_lse128, ARM_HWCAP2_A64_LSE128);
221 GET_FEATURE_ID(aa64_faminmax, ARM_HWCAP2_A64_FAMINMAX);
222 + GET_FEATURE_ID(aa64_fpmr, ARM_HWCAP2_A64_FPMR);
223
224 return hwcaps;
225 }
target/arm/tcg/cpu64.c
+4
@@ -1297,6 +1297,10 @@ void aarch64_max_tcg_initfn(Object *obj)
1297 t = FIELD_DP64(t, ID_AA64PFR1, GCS, 1); /* FEAT_GCS */
1298 SET_IDREG(isar, ID_AA64PFR1, t);
1299
1300 + t = GET_IDREG(isar, ID_AA64PFR2);
1301 + t = FIELD_DP64(t, ID_AA64PFR2, FPMR, 1); /* FEAT_FPMR */
1302 + SET_IDREG(isar, ID_AA64PFR2, t);
1303 +
1304 t = GET_IDREG(isar, ID_AA64MMFR0);
1305 t = FIELD_DP64(t, ID_AA64MMFR0, PARANGE, 6); /* FEAT_LPA: 52 bits */
1306 t = FIELD_DP64(t, ID_AA64MMFR0, TGRAN16, 1); /* 16k pages supported */