target/arm: Enable FEAT_FPMR for -cpu max
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260522220306.235200-18-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
May 22, 2026 at 15:02 UTC
2430d49a17c99c91e0824e3364e14ebd8547d1a4
3 files changed
+6
docs/system/arm/emulation.rst
+1
@@ -77,6 +77,7 @@ the following architecture extensions:
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- FEAT_FPAC (Faulting on AUT* instructions)
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- FEAT_FPACCOMBINE (Faulting on combined pointer authentication instructions)
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- FEAT_FPACC_SPEC (Speculative behavior of combined pointer authentication instructions)
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+- FEAT_FPMR (Floating-point Mode Register)
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- FEAT_FRINTTS (Floating-point to integer instructions)
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- FEAT_FlagM (Flag manipulation instructions v2)
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- FEAT_FlagM2 (Enhancements to flag manipulation instructions)
linux-user/aarch64/elfload.c
+1
@@ -219,6 +219,7 @@ abi_ulong get_elf_hwcap2(CPUState *cs)
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GET_FEATURE_ID(aa64_cssc, ARM_HWCAP2_A64_CSSC);
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GET_FEATURE_ID(aa64_lse128, ARM_HWCAP2_A64_LSE128);
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GET_FEATURE_ID(aa64_faminmax, ARM_HWCAP2_A64_FAMINMAX);
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+ GET_FEATURE_ID(aa64_fpmr, ARM_HWCAP2_A64_FPMR);
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return hwcaps;
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}
target/arm/tcg/cpu64.c
+4
@@ -1297,6 +1297,10 @@ void aarch64_max_tcg_initfn(Object *obj)
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t = FIELD_DP64(t, ID_AA64PFR1, GCS, 1); /* FEAT_GCS */
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SET_IDREG(isar, ID_AA64PFR1, t);
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+ t = GET_IDREG(isar, ID_AA64PFR2);
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+ t = FIELD_DP64(t, ID_AA64PFR2, FPMR, 1); /* FEAT_FPMR */
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+ SET_IDREG(isar, ID_AA64PFR2, t);
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+
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t = GET_IDREG(isar, ID_AA64MMFR0);
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t = FIELD_DP64(t, ID_AA64MMFR0, PARANGE, 6); /* FEAT_LPA: 52 bits */
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t = FIELD_DP64(t, ID_AA64MMFR0, TGRAN16, 1); /* 16k pages supported */