target/arm: GICv5 cpuif: Recalculate IRQ/FIQ on ICC_PCR_EL1 write
When the guest writes ICC_PCR_EL1 we should recheck whether we should be signalling IRQ or FIQ, because we use this priority mask value in determining whether the highest priority interrupt should be signalled or not. Fixes: 9bd90bddb79b ("target/arm: GICv5 cpuif: Signal IRQ or FIQ") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Message-id: 20260615105029.2898872-3-peter.maydell@linaro.org
Peter Maydell committed
Jun 15, 2026 at 11:50 UTC
2494e3c4de97f24fe4546890a095345adb0547a5
1 file changed
+1
target/arm/tcg/gicv5-cpuif.c
+1
@@ -565,6 +565,7 @@ static void gic_icc_pcr_el1_write(CPUARMState *env, const ARMCPRegInfo *ri,
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value &= R_ICC_PCR_PRIORITY_MASK;
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env->gicv5_cpuif.icc_pcr[domain] = value;
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+ gicv5_update_irq_fiq(env);
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}
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static void gic_icc_pcr_el1_reset(CPUARMState *env, const ARMCPRegInfo *ri)