@samitouri / QOSamiQemu / commits / 24bf68e381

target/arm/ptw: Flip sense of get_phys_addr_for_at return value

Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260515142541.571911-14-peter.maydell@linaro.org

Peter Maydell committed May 15, 2026 at 15:25 UTC 24bf68e381ecfa73b72e5ccfb7bceb791b10e0d7
3 files changed +9 -7
target/arm/internals.h
+2
@@ -1526,6 +1526,8 @@ bool get_phys_addr(CPUARMState *env, vaddr address,
1526 *
1527 * Similar to get_phys_addr, but for use by AccessType_AT, i.e.
1528 * system instructions for address translation.
1529 + *
1530 + * Returns: false on translation failure, true on success.
1531 */
1532 bool get_phys_addr_for_at(CPUARMState *env, vaddr address, unsigned prot_check,
1533 ARMMMUIdx mmu_idx, ARMSecuritySpace space,
target/arm/ptw.c
+1 -1
@@ -3851,7 +3851,7 @@ bool get_phys_addr_for_at(CPUARMState *env, vaddr address,
3851 * check is handled or bypassed by .in_prot_check) and "memop = MO_8"
3852 * bypasses any alignment check.
3853 */
3854 - return !get_phys_addr_nogpc(env, &ptw, address,
3854 + return get_phys_addr_nogpc(env, &ptw, address,
3855 MMU_DATA_LOAD, MO_8, result, fi);
3856 }
3857
target/arm/tcg/cpregs-at.c
+6 -6
@@ -31,17 +31,17 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t value,
31 bool format64 = false;
32 ARMMMUFaultInfo fi = {};
33 GetPhysAddrResult res = {};
34 - bool ret = get_phys_addr_for_at(env, value, prot_check,
35 - mmu_idx, ss, &res, &fi);
34 + bool ok = get_phys_addr_for_at(env, value, prot_check,
35 + mmu_idx, ss, &res, &fi);
36
37 /*
38 * ATS operations only do S1 or S1+S2 translations, so we never
39 * have to deal with the ARMCacheAttrs format for S2 only.
40 * (Note that res fields are only valid on ptw success.)
41 */
42 - assert(ret || !res.cacheattrs.is_s2_format);
42 + assert(!ok || !res.cacheattrs.is_s2_format);
43
44 - if (ret) {
44 + if (!ok) {
45 /*
46 * Some kinds of translation fault must cause exceptions rather
47 * than being reported in the PAR.
@@ -144,7 +144,7 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t value,
144 if (format64) {
145 /* Create a 64-bit PAR */
146 par64 = (1 << 11); /* LPAE bit always set */
147 - if (!ret) {
147 + if (ok) {
148 par64 |= res.f.phys_addr & ~0xfffULL;
149 if (!res.f.attrs.secure) {
150 par64 |= (1 << 9); /* NS */
@@ -169,7 +169,7 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t value,
169 * translation table format (with WnR always clear).
170 * Convert it to a 32-bit PAR.
171 */
172 - if (!ret) {
172 + if (ok) {
173 /* We do not set any attribute bits in the PAR */
174 if (res.f.lg_page_size == 24
175 && arm_feature(env, ARM_FEATURE_V7)) {