amd_iommu: Use switch case to determine mmio register name
This makes it easier to add new MMIO registers for tracing and removes the unnecessary complexity introduced by amdvi_mmio_(low/high) array. Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com> Reviewed-by: Vasant Hegde <vasant.hegde@amd.com> Reviewed-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20260302115130.5903-2-sarunkod@amd.com>
Sairaj Kodilkar committed
Mar 2, 2026 at 17:21 UTC
25e92816c8d1e4c4f35a1c076d9d5f3a90e17a93
2 files changed
+27
-53
hw/i386/amd_iommu.c
+27
-49
@@ -35,29 +35,6 @@
35
#include "kvm/kvm_i386.h"
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#include "qemu/iova-tree.h"
37
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-/* used AMD-Vi MMIO registers */
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-const char *amdvi_mmio_low[] = {
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- "AMDVI_MMIO_DEVTAB_BASE",
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- "AMDVI_MMIO_CMDBUF_BASE",
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- "AMDVI_MMIO_EVTLOG_BASE",
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- "AMDVI_MMIO_CONTROL",
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- "AMDVI_MMIO_EXCL_BASE",
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- "AMDVI_MMIO_EXCL_LIMIT",
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- "AMDVI_MMIO_EXT_FEATURES",
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- "AMDVI_MMIO_PPR_BASE",
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- "UNHANDLED"
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-};
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-const char *amdvi_mmio_high[] = {
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- "AMDVI_MMIO_COMMAND_HEAD",
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- "AMDVI_MMIO_COMMAND_TAIL",
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- "AMDVI_MMIO_EVTLOG_HEAD",
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- "AMDVI_MMIO_EVTLOG_TAIL",
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- "AMDVI_MMIO_STATUS",
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- "AMDVI_MMIO_PPR_HEAD",
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- "AMDVI_MMIO_PPR_TAIL",
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- "UNHANDLED"
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-};
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-
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struct AMDVIAddressSpace {
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PCIBus *bus; /* PCIBus (for bus number) */
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uint8_t devfn; /* device function */
@@ -1540,31 +1517,31 @@ static void amdvi_cmdbuf_run(AMDVIState *s)
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}
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}
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-static inline uint8_t amdvi_mmio_get_index(hwaddr addr)
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-{
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- uint8_t index = (addr & ~0x2000) / 8;
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-
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- if ((addr & 0x2000)) {
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- /* high table */
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- index = index >= AMDVI_MMIO_REGS_HIGH ? AMDVI_MMIO_REGS_HIGH : index;
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- } else {
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- index = index >= AMDVI_MMIO_REGS_LOW ? AMDVI_MMIO_REGS_LOW : index;
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+static inline
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+const char *amdvi_mmio_get_name(hwaddr addr)
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+{
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+ /* Return MMIO names as string literals */
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+ switch (addr) {
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+#define MMIO_REG_TO_STRING(mmio_reg) case mmio_reg: return #mmio_reg
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+ MMIO_REG_TO_STRING(AMDVI_MMIO_DEVICE_TABLE);
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+ MMIO_REG_TO_STRING(AMDVI_MMIO_COMMAND_BASE);
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+ MMIO_REG_TO_STRING(AMDVI_MMIO_EVENT_BASE);
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+ MMIO_REG_TO_STRING(AMDVI_MMIO_CONTROL);
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+ MMIO_REG_TO_STRING(AMDVI_MMIO_EXCL_BASE);
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+ MMIO_REG_TO_STRING(AMDVI_MMIO_EXCL_LIMIT);
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+ MMIO_REG_TO_STRING(AMDVI_MMIO_EXT_FEATURES);
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+ MMIO_REG_TO_STRING(AMDVI_MMIO_COMMAND_HEAD);
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+ MMIO_REG_TO_STRING(AMDVI_MMIO_COMMAND_TAIL);
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+ MMIO_REG_TO_STRING(AMDVI_MMIO_EVENT_HEAD);
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+ MMIO_REG_TO_STRING(AMDVI_MMIO_EVENT_TAIL);
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+ MMIO_REG_TO_STRING(AMDVI_MMIO_STATUS);
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+ MMIO_REG_TO_STRING(AMDVI_MMIO_PPR_BASE);
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+ MMIO_REG_TO_STRING(AMDVI_MMIO_PPR_HEAD);
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+ MMIO_REG_TO_STRING(AMDVI_MMIO_PPR_TAIL);
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+#undef MMIO_REG_TO_STRING
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+ default:
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+ return "UNHANDLED";
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}
1553
-
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- return index;
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-}
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-
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-static void amdvi_mmio_trace_read(hwaddr addr, unsigned size)
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-{
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- uint8_t index = amdvi_mmio_get_index(addr);
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- trace_amdvi_mmio_read(amdvi_mmio_low[index], addr, size, addr & ~0x07);
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-}
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-
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-static void amdvi_mmio_trace_write(hwaddr addr, unsigned size, uint64_t val)
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-{
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- uint8_t index = amdvi_mmio_get_index(addr);
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- trace_amdvi_mmio_write(amdvi_mmio_low[index], addr, size, val,
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- addr & ~0x07);
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}
1546
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static uint64_t amdvi_mmio_read(void *opaque, hwaddr addr, unsigned size)
@@ -1584,7 +1561,7 @@ static uint64_t amdvi_mmio_read(void *opaque, hwaddr addr, unsigned size)
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} else if (size == 8) {
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val = amdvi_readq(s, addr);
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}
1587
- amdvi_mmio_trace_read(addr, size);
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+ trace_amdvi_mmio_read(amdvi_mmio_get_name(addr), addr, size, addr & ~0x07);
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return val;
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}
@@ -1742,7 +1719,8 @@ static void amdvi_mmio_write(void *opaque, hwaddr addr, uint64_t val,
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return;
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}
1721
1745
- amdvi_mmio_trace_write(addr, size, val);
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+ trace_amdvi_mmio_write(amdvi_mmio_get_name(addr), addr, size, val, offset);
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+
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switch (addr & ~0x07) {
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case AMDVI_MMIO_CONTROL:
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amdvi_mmio_reg_write(s, size, val, addr);
hw/i386/amd_iommu.h
-4
@@ -45,10 +45,6 @@
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#define AMDVI_CAPAB_FLAG_IOTLBSUP (1 << 24)
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#define AMDVI_CAPAB_INIT_TYPE (3 << 16)
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-/* No. of used MMIO registers */
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-#define AMDVI_MMIO_REGS_HIGH 7
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-#define AMDVI_MMIO_REGS_LOW 8
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-
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/* MMIO registers */
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#define AMDVI_MMIO_DEVICE_TABLE 0x0000
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#define AMDVI_MMIO_COMMAND_BASE 0x0008