Revert "aspeed/smc: snoop SPI transfers to fake dummy cycles"
This reverts commit f95c4bffdc4c53b29f89762cab4adc5a43f95daf. The m25p80 model now accounts for fast-read dummy bytes in its command decoder. In ASPEED SMC model user mode, guest software already sends the complete byte stream, including any dummy bytes needed by the flash. Hence the model should just forward exactly the bytes supplied by the guest without the need of decoding guest-supplied flash op codes to inject extra dummy transfers. Signed-off-by: Bin Meng <bin.meng@processmission.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Tested-by: Cédric Le Goater <clg@redhat.com> Message-ID: <20260707083431.219671-10-bin.meng@processmission.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Bin Meng committed
Jul 7, 2026 at 16:34 UTC
27961a043c14e802a4112de1f49e0dd0f8c2f583
3 files changed
+2
-115
hw/ssi/aspeed_smc.c
+2
-112
@@ -197,9 +197,6 @@
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/* Flash opcodes. */
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#define SPI_OP_READ 0x03 /* Read data bytes (low frequency) */
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-#define SNOOP_OFF 0xFF
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-#define SNOOP_START 0x0
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-
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/*
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* Default segments mapping addresses and size for each peripheral per
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* controller. These can be changed when board is initialized with the
@@ -537,104 +534,6 @@ static MemTxResult aspeed_smc_flash_read(void *opaque, hwaddr addr,
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return MEMTX_OK;
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}
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-/*
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- * TODO (clg@kaod.org): stolen from xilinx_spips.c. Should move to a
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- * common include header.
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- */
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-typedef enum {
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- READ = 0x3, READ_4 = 0x13,
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- FAST_READ = 0xb, FAST_READ_4 = 0x0c,
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- DOR = 0x3b, DOR_4 = 0x3c,
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- QOR = 0x6b, QOR_4 = 0x6c,
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- DIOR = 0xbb, DIOR_4 = 0xbc,
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- QIOR = 0xeb, QIOR_4 = 0xec,
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-
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- PP = 0x2, PP_4 = 0x12,
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- DPP = 0xa2,
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- QPP = 0x32, QPP_4 = 0x34,
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-} FlashCMD;
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-
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-static int aspeed_smc_num_dummies(uint8_t command)
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-{
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- switch (command) { /* check for dummies */
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- case READ: /* no dummy bytes/cycles */
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- case PP:
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- case DPP:
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- case QPP:
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- case READ_4:
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- case PP_4:
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- case QPP_4:
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- return 0;
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- case FAST_READ:
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- case DOR:
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- case QOR:
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- case DOR_4:
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- case QOR_4:
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- return 1;
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- case DIOR:
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- case FAST_READ_4:
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- case DIOR_4:
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- return 2;
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- case QIOR:
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- case QIOR_4:
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- return 4;
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- default:
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- return -1;
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- }
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-}
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-
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-static bool aspeed_smc_do_snoop(AspeedSMCFlash *fl, uint64_t data,
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- unsigned size)
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-{
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- AspeedSMCState *s = fl->controller;
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- uint8_t addr_width = aspeed_smc_flash_addr_width(fl);
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-
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- trace_aspeed_smc_do_snoop(fl->cs, s->snoop_index, s->snoop_dummies,
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- (uint8_t) data & 0xff);
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-
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- if (s->snoop_index == SNOOP_OFF) {
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- return false; /* Do nothing */
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-
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- } else if (s->snoop_index == SNOOP_START) {
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- uint8_t cmd = data & 0xff;
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- int ndummies = aspeed_smc_num_dummies(cmd);
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-
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- /*
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- * No dummy cycles are expected with the current command. Turn
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- * off snooping and let the transfer proceed normally.
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- */
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- if (ndummies <= 0) {
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- s->snoop_index = SNOOP_OFF;
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- return false;
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- }
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-
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- s->snoop_dummies = ndummies * 8;
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-
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- } else if (s->snoop_index >= addr_width + 1) {
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-
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- /* The SPI transfer has reached the dummy cycles sequence */
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- for (; s->snoop_dummies; s->snoop_dummies--) {
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- ssi_transfer(s->spi, s->regs[R_DUMMY_DATA] & 0xff);
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- }
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-
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- /* If no more dummy cycles are expected, turn off snooping */
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- if (!s->snoop_dummies) {
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- s->snoop_index = SNOOP_OFF;
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- } else {
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- s->snoop_index += size;
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- }
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-
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- /*
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- * Dummy cycles have been faked already. Ignore the current
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- * SPI transfer
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- */
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- return true;
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- }
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-
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- s->snoop_index += size;
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- return false;
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-}
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-
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static MemTxResult aspeed_smc_flash_write(void *opaque, hwaddr addr,
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uint64_t data, unsigned size, MemTxAttrs attrs)
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{
@@ -652,10 +551,6 @@ static MemTxResult aspeed_smc_flash_write(void *opaque, hwaddr addr,
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switch (aspeed_smc_flash_mode(fl)) {
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case CTRL_USERMODE:
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- if (aspeed_smc_do_snoop(fl, data, size)) {
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- break;
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- }
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-
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for (i = 0; i < size; i++) {
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ssi_transfer(s->spi, (data >> (8 * i)) & 0xff);
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}
@@ -717,7 +612,6 @@ static void aspeed_smc_flash_update_ctrl(AspeedSMCFlash *fl, uint32_t value)
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s->regs[s->r_ctrl0 + fl->cs] = value;
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if (unselect != s->unselect) {
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- s->snoop_index = unselect ? SNOOP_OFF : SNOOP_START;
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aspeed_smc_flash_do_select(fl, unselect);
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}
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}
@@ -763,9 +657,6 @@ static void aspeed_smc_reset_hold(Object *obj, ResetType type)
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aspeed_smc_flash_set_segment_region(s, i,
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asc->segment_to_reg(s, &asc->segments[i]));
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}
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-
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- s->snoop_index = SNOOP_OFF;
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- s->snoop_dummies = 0;
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}
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static MemTxResult aspeed_smc_read(void *opaque, hwaddr addr, uint64_t *data,
@@ -1293,11 +1184,10 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp)
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static const VMStateDescription vmstate_aspeed_smc = {
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.name = "aspeed.smc",
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.version_id = 3,
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- .minimum_version_id = 2,
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+ .minimum_version_id = 1,
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32_ARRAY(regs, AspeedSMCState, ASPEED_SMC_R_MAX),
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- VMSTATE_UINT8(snoop_index, AspeedSMCState),
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- VMSTATE_UINT8(snoop_dummies, AspeedSMCState),
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+ VMSTATE_UNUSED_V(2, 2), /* was snoop_index/snoop_dummies */
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VMSTATE_BOOL_V(unselect, AspeedSMCState, 3),
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VMSTATE_END_OF_LIST()
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}
hw/ssi/trace-events
-1
@@ -2,7 +2,6 @@
2
3
aspeed_smc_flash_set_segment(int cs, uint64_t reg, uint64_t start, uint64_t end) "CS%d segreg=0x%"PRIx64" [ 0x%"PRIx64" - 0x%"PRIx64" ]"
4
aspeed_smc_flash_read(int cs, uint64_t addr, uint32_t size, uint64_t data, int mode) "CS%d @0x%" PRIx64 " size %u: 0x%" PRIx64" mode:%d"
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-aspeed_smc_do_snoop(int cs, int index, int dummies, int data) "CS%d index:0x%x dummies:%d data:0x%x"
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aspeed_smc_flash_write(int cs, uint64_t addr, uint32_t size, uint64_t data, int mode) "CS%d @0x%" PRIx64 " size %u: 0x%" PRIx64" mode:%d"
6
aspeed_smc_read(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size %u: 0x%" PRIx64
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aspeed_smc_dma_checksum(uint32_t addr, uint32_t data) "0x%08x: 0x%08x"
include/hw/ssi/aspeed_smc.h
-2
@@ -80,8 +80,6 @@ struct AspeedSMCState {
80
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AspeedSMCFlash flashes[ASPEED_SMC_CS_MAX];
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- uint8_t snoop_index;
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- uint8_t snoop_dummies;
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bool unselect;
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};
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