target/ppc: Restrict TCGTBCPUState to TCG
TCGTBCPUState is a structure used during TCG translation, therefore not needed when TCG is not available. Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260616153432.92939-4-philmd@oss.qualcomm.com>
Philippe Mathieu-Daudé committed
Jun 16, 2026 at 17:29 UTC
3632840c3b335fe728fb934d0e7f58df8d06c3b1
2 files changed
+6
-2
target/ppc/helper_regs.c
+2
-1
@@ -27,7 +27,6 @@
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#include "power8-pmu.h"
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#include "cpu-models.h"
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#include "spr_common.h"
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-#include "accel/tcg/cpu-ops.h"
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#include "internal.h"
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/* Swap temporary saved registers with GPRs */
@@ -261,6 +260,7 @@ void hreg_update_pmu_hflags(CPUPPCState *env)
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env->hflags |= hreg_compute_pmu_hflags_value(env);
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}
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+#ifdef CONFIG_TCG
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TCGTBCPUState ppc_get_tb_cpu_state(CPUState *cs)
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{
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CPUPPCState *env = cpu_env(cs);
@@ -277,6 +277,7 @@ TCGTBCPUState ppc_get_tb_cpu_state(CPUState *cs)
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return (TCGTBCPUState){ .pc = env->nip, .flags = hflags_current };
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}
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+#endif /* CONFIG_TCG */
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#ifndef CONFIG_USER_ONLY
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void cpu_interrupt_exittb(CPUState *cs)
target/ppc/internal.h
+4
-1
@@ -22,7 +22,6 @@
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#include "exec/memop.h"
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#include "hw/core/registerfields.h"
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#include "exec/page-protection.h"
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-#include "accel/tcg/tb-cpu-state.h"
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static inline bool ppc_env_is_little_endian(const CPUPPCState *env)
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{
@@ -326,6 +325,10 @@ static inline int ger_pack_masks(int pmsk, int ymsk, int xmsk)
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return msk;
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}
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+#ifdef CONFIG_TCG
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+#include "accel/tcg/tb-cpu-state.h"
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+
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TCGTBCPUState ppc_get_tb_cpu_state(CPUState *cs);
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+#endif
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#endif /* PPC_INTERNAL_H */