@samitouri / QOSamiQemu / commits / 371c06fdff

target/loongarch: Add generic CPU model information

On LoongArch system, CPU model name comes from IOCSR register LOONGARCH_IOCSR_VENDOR and LOONGARCH_IOCSR_CPUNAME. Its value can be initialized when CPU is created. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>

Bibo Mao committed Feb 25, 2026 at 09:41 UTC 371c06fdff3f23134994bc620da9a9336db5ffe8
3 files changed +14 -2
hw/loongarch/virt.c
+4 -2
@@ -777,7 +777,9 @@ static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr,
777 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque);
778 uint64_t ret = 0;
779 int features;
780 + CPULoongArchState *env;
781
782 + env = &LOONGARCH_CPU(first_cpu)->env;
783 switch (addr) {
784 case VERSION_REG:
785 ret = 0x11ULL;
@@ -792,10 +794,10 @@ static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr,
794 }
795 break;
796 case VENDOR_REG:
795 - ret = 0x6e6f73676e6f6f4cULL; /* "Loongson" */
797 + ret = env->vendor_id;
798 break;
799 case CPUNAME_REG:
798 - ret = 0x303030354133ULL; /* "3A5000" */
800 + ret = env->cpu_id;
801 break;
802 case MISC_FUNC_REG:
803 if (kvm_irqchip_in_kernel()) {
target/loongarch/cpu.c
+4
@@ -287,6 +287,8 @@ static void loongarch_la464_initfn(Object *obj)
287 data = FIELD_DP32(data, CPUCFG0, SERID, PRID_SERIES_LA464);
288 data = FIELD_DP32(data, CPUCFG0, VENID, PRID_VENDOR_LOONGSON);
289 env->cpucfg[0] = data;
290 + memccpy((void *)&env->vendor_id, CPU_VENDOR_LOONGSON, 0, 8);
291 + memccpy((void *)&env->cpu_id, CPU_MODEL_3A5000, 0, 8);
292
293 data = 0;
294 data = FIELD_DP32(data, CPUCFG1, ARCH, 2);
@@ -413,6 +415,8 @@ static void loongarch_la132_initfn(Object *obj)
415 data = FIELD_DP32(data, CPUCFG0, SERID, PRID_SERIES_LA132);
416 data = FIELD_DP32(data, CPUCFG0, VENID, PRID_VENDOR_LOONGSON);
417 env->cpucfg[0] = data;
418 + memccpy((void *)&env->vendor_id, CPU_VENDOR_LOONGSON, 0, 8);
419 + memccpy((void *)&env->cpu_id, CPU_MODEL_1C101, 0, 8);
420
421 data = 0;
422 data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */
target/loongarch/cpu.h
+6
@@ -307,6 +307,10 @@ typedef struct LoongArchBT {
307 uint32_t ftop;
308 } lbt_t;
309
310 +#define CPU_VENDOR_LOONGSON "Loongson"
311 +#define CPU_MODEL_3A5000 "3A5000"
312 +#define CPU_MODEL_1C101 "1C101"
313 +
314 typedef struct CPUArchState {
315 uint64_t gpr[32];
316 uint64_t pc;
@@ -318,6 +322,8 @@ typedef struct CPUArchState {
322
323 uint32_t cpucfg[21];
324 uint32_t pv_features;
325 + uint64_t vendor_id;
326 + uint64_t cpu_id;
327
328 /* LoongArch CSRs */
329 uint64_t CSR_CRMD;