hw/arm/aspeed_ast27x0: Enable 64-bit EHCI DMA addressing
AST2700 supports a 64-bit DRAM address space. Therefore, DMA transactions must be capable of accessing 64-bit addresses. Enable the "caps-64bit-addr" property for the EHCI controllers on AST2700 so that USB DMA operations can correctly handle 64-bit memory addresses. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Link: https://lore.kernel.org/qemu-devel/20260713032704.3583103-10-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Jamin Lin committed
Jul 13, 2026 at 03:27 UTC
39170be7cf5ac55ca079e60d136b9eb5d2a25ff3
1 file changed
+2
hw/arm/aspeed_ast27x0.c
+2
@@ -873,6 +873,8 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
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object_property_set_int(OBJECT(&s->ehci[i]), "ctrldssegment-default",
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sc->memmap[ASPEED_DEV_SDRAM] >> 32,
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&error_abort);
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+ object_property_set_bool(OBJECT(&s->ehci[i]), "caps-64bit-addr", true,
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+ &error_abort);
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), errp)) {
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return;
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}