target/tricore: Enable disassembly via capstone
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson committed
Aug 8, 2026 at 13:19 UTC
3a002bbcdd65030bc93f0435f91325f4ef5cb171
2 files changed
+42
include/disas/capstone.h
+11
@@ -78,4 +78,15 @@
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#define CS_MODE_SH4A 0
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#endif
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+#if CS_API_MAJOR < 5
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+#define CS_ARCH_TRICORE -1
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+#define CS_MODE_TRICORE_110 0
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+#define CS_MODE_TRICORE_120 0
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+#define CS_MODE_TRICORE_130 0
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+#define CS_MODE_TRICORE_131 0
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+#define CS_MODE_TRICORE_160 0
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+#define CS_MODE_TRICORE_161 0
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+#define CS_MODE_TRICORE_162 0
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+#endif
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+
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#endif /* QEMU_CAPSTONE_H */
target/tricore/cpu.c
+31
@@ -24,6 +24,7 @@
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#include "qemu/error-report.h"
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#include "tcg/debug-assert.h"
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#include "accel/tcg/cpu-ops.h"
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+#include "disas/capstone.h"
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static inline void set_feature(CPUTriCoreState *env, int feature)
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{
@@ -35,6 +36,35 @@ static const gchar *tricore_gdb_arch_name(CPUState *cs)
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return "tricore";
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}
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+static void tricore_disas_set_info(const CPUState *cpu, disassemble_info *info)
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+{
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+ CPUTriCoreState *env = cpu_env((CPUState *)cpu);
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+
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+ info->endian = BFD_ENDIAN_LITTLE;
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+ info->cap_arch = CS_ARCH_TRICORE;
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+ info->cap_insn_unit = 4;
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+ info->cap_insn_split = 4;
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+
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+ /*
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+ * Possible capstone bug: the isa levels are not additive.
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+ * Work around by settiing only one.
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+ * Note that TriCore 1.3.0 is the earliest we support.
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+ */
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+ if (tricore_has_feature(env, TRICORE_FEATURE_162)) {
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+ info->cap_mode = CS_MODE_TRICORE_162;
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+ } else if (tricore_has_feature(env, TRICORE_FEATURE_161)) {
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+ info->cap_mode = CS_MODE_TRICORE_161;
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+ } else if (tricore_has_feature(env, TRICORE_FEATURE_16)) {
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+ info->cap_mode = CS_MODE_TRICORE_160;
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+ } else if (tricore_has_feature(env, TRICORE_FEATURE_131)) {
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+ info->cap_mode = CS_MODE_TRICORE_131;
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+ } else if (tricore_has_feature(env, TRICORE_FEATURE_13)) {
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+ info->cap_mode = CS_MODE_TRICORE_130;
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+ } else {
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+ g_assert_not_reached();
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+ }
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+}
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+
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static void tricore_cpu_set_pc(CPUState *cs, vaddr value)
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{
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cpu_env(cs)->PC = value & ~1;
@@ -214,6 +244,7 @@ static void tricore_cpu_class_init(ObjectClass *c, const void *data)
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cc->gdb_write_register = tricore_cpu_gdb_write_register;
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cc->gdb_num_core_regs = 44;
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cc->gdb_arch_name = tricore_gdb_arch_name;
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+ cc->disas_set_info = tricore_disas_set_info;
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cc->dump_state = tricore_cpu_dump_state;
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cc->set_pc = tricore_cpu_set_pc;