target/ppc: Convert mcrf to decode tree
Convert mcrf to decode tree specification. The functionality was tested by comparing the qemu -D log -d op,in_asm output as well as single stepping gdb. Signed-off-by: Shivani Nittor <shivani@linux.ibm.com> Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Reviewed-by: Amit Machhiwal <amachhiw@linux.ibm.com> Signed-off-by: Chinmay Rath <rathc@linux.ibm.com> Tested-by: Aniket Sahu <asahu1x@linux.ibm.com> Link: https://lore.kernel.org/qemu-devel/20260827133010.278889-10-rathc@linux.ibm.com Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Shivani Nittor committed
Aug 27, 2026 at 18:59 UTC
3a80ba99a207e458fa653697d2bd5f2b8505e7cb
3 files changed
+12
-7
target/ppc/insn32.decode
+6
@@ -1452,6 +1452,12 @@ MSGSYNC 011111 ----- ----- ----- 1101110110 -
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SYNC 011111 -- ... --- .. ----- 1001010110 - @X_sync
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EIEIO 011111 ----- ----- ----- 1101010110 -
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+# Condition Register Field Instruction
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+
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+&XL_bfa bf bfa
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+@XL_bfa ...... bf:3 .. bfa:3 .. ..... ..... ..... .
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+MCRF 010011 ... -- ... -- ----- 00000 00000 - @XL_bfa
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+
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# Branch History Rolling Buffer (BHRB) Instructions
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&XFX_bhrbe rt bhrbe
target/ppc/translate.c
-7
@@ -3642,12 +3642,6 @@ GEN_CRLOGIC(crorc, tcg_gen_orc_i32, 0x0D);
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/* crxor */
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GEN_CRLOGIC(crxor, tcg_gen_xor_i32, 0x06);
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-/* mcrf */
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-static void gen_mcrf(DisasContext *ctx)
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-{
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- tcg_gen_mov_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfS(ctx->opcode)]);
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-}
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-
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/*** System linkage ***/
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/* rfi (supervisor only) */
@@ -5709,7 +5703,6 @@ GEN_HANDLER(bc, 0x10, 0xFF, 0xFF, 0x00000000, PPC_FLOW),
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GEN_HANDLER(bcctr, 0x13, 0x10, 0x10, 0x00000000, PPC_FLOW),
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GEN_HANDLER(bclr, 0x13, 0x10, 0x00, 0x00000000, PPC_FLOW),
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GEN_HANDLER_E(bctar, 0x13, 0x10, 0x11, 0x0000E000, PPC_NONE, PPC2_BCTAR_ISA207),
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-GEN_HANDLER(mcrf, 0x13, 0x00, 0xFF, 0x00000001, PPC_INTEGER),
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GEN_HANDLER(rfi, 0x13, 0x12, 0x01, 0x03FF8001, PPC_FLOW),
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#if defined(TARGET_PPC64)
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GEN_HANDLER(rfid, 0x13, 0x12, 0x00, 0x03FF8001, PPC_64B),
target/ppc/translate/misc-impl.c.inc
+6
@@ -155,3 +155,9 @@ static bool trans_ATTN(DisasContext *ctx, arg_ATTN *a)
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return false;
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#endif
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}
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+
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+static bool trans_MCRF(DisasContext *ctx, arg_MCRF *a)
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+{
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+ tcg_gen_mov_i32(cpu_crf[a->bf], cpu_crf[a->bfa]);
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+ return true;
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+}