target/arm: Add isar_feature_aa64_f8cvt
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260522220306.235200-20-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
May 22, 2026 at 15:02 UTC
3b1ed6b5cfe8e3ef1058cb85bb3c2308464539e1
1 file changed
+5
target/arm/cpu-features.h
+5
@@ -1569,6 +1569,11 @@ static inline bool isar_feature_aa64_sme2p1(const ARMISARegisters *id)
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return FIELD_EX64_IDREG(id, ID_AA64SMFR0, SMEVER) >= 2;
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}
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+static inline bool isar_feature_aa64_f8cvt(const ARMISARegisters *id)
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+{
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+ return FIELD_EX64_IDREG(id, ID_AA64FPFR0, F8CVT);
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+}
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+
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/*
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* Combinations of feature tests, for ease of use with TRANS_FEAT.
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*/