@samitouri / QOSamiQemu / commits / 3bec6b0bc4

target/tcg: Rename unaligned_access() helpers

In order to avoid symbol name clash when building a single binary, rename TCG helpers prefixing with the target name. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Message-Id: <20260224193028.2370-4-philmd@linaro.org>

Philippe Mathieu-Daudé committed Feb 11, 2026 at 13:35 UTC 3bec6b0bc419f39ecc8c9156b348a6f206e4c8fb
6 files changed +8 -8
target/arm/tcg/helper-a64-defs.h
+1 -1
@@ -113,7 +113,7 @@ DEF_HELPER_FLAGS_2(ldgm, TCG_CALL_NO_WG, i64, env, i64)
113 DEF_HELPER_FLAGS_3(stgm, TCG_CALL_NO_WG, void, env, i64, i64)
114 DEF_HELPER_FLAGS_3(stzgm_tags, TCG_CALL_NO_WG, void, env, i64, i64)
115
116 -DEF_HELPER_FLAGS_4(unaligned_access, TCG_CALL_NO_WG,
116 +DEF_HELPER_FLAGS_4(arm_unaligned_access, TCG_CALL_NO_WG,
117 noreturn, env, i64, i32, i32)
118
119 DEF_HELPER_3(setp, void, env, i32, i32)
target/arm/tcg/helper-a64.c
+2 -2
@@ -835,8 +835,8 @@ void HELPER(dc_zva)(CPUARMState *env, uint64_t vaddr_in)
835 clear_helper_retaddr();
836 }
837
838 -void HELPER(unaligned_access)(CPUARMState *env, uint64_t addr,
839 - uint32_t access_type, uint32_t mmu_idx)
838 +void HELPER(arm_unaligned_access)(CPUARMState *env, uint64_t addr,
839 + uint32_t access_type, uint32_t mmu_idx)
840 {
841 arm_cpu_do_unaligned_access(env_cpu(env), addr, access_type,
842 mmu_idx, GETPC());
target/arm/tcg/translate-a64.c
+2 -2
@@ -382,8 +382,8 @@ static void check_lse2_align(DisasContext *s, int rn, int imm,
382
383 type = is_write ? MMU_DATA_STORE : MMU_DATA_LOAD,
384 mmu_idx = get_mem_index(s);
385 - gen_helper_unaligned_access(tcg_env, addr, tcg_constant_i32(type),
386 - tcg_constant_i32(mmu_idx));
385 + gen_helper_arm_unaligned_access(tcg_env, addr, tcg_constant_i32(type),
386 + tcg_constant_i32(mmu_idx));
387
388 gen_set_label(over_label);
389
target/microblaze/helper.c
+1 -1
@@ -69,7 +69,7 @@ void mb_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
69
70 #ifndef CONFIG_USER_ONLY
71
72 -void HELPER(unaligned_access)(CPUMBState *env, uint64_t addr)
72 +void HELPER(microblaze_unaligned_access)(CPUMBState *env, uint64_t addr)
73 {
74 mb_unaligned_access_internal(env_cpu(env), addr, GETPC());
75 }
target/microblaze/helper.h
+1 -1
@@ -27,7 +27,7 @@ DEF_HELPER_FLAGS_3(put, TCG_CALL_NO_RWG, void, i32, i32, i32)
27 #ifndef CONFIG_USER_ONLY
28 DEF_HELPER_FLAGS_3(mmu_read, TCG_CALL_NO_RWG, i32, env, i32, i32)
29 DEF_HELPER_FLAGS_4(mmu_write, TCG_CALL_NO_RWG, void, env, i32, i32, i32)
30 -DEF_HELPER_FLAGS_2(unaligned_access, TCG_CALL_NO_WG, noreturn, env, i64)
30 +DEF_HELPER_FLAGS_2(microblaze_unaligned_access, TCG_CALL_NO_WG, noreturn, env, i64)
31 DEF_HELPER_FLAGS_2(lbuea, TCG_CALL_NO_WG, i32, env, i64)
32 DEF_HELPER_FLAGS_2(lhuea_be, TCG_CALL_NO_WG, i32, env, i64)
33 DEF_HELPER_FLAGS_2(lhuea_le, TCG_CALL_NO_WG, i32, env, i64)
target/microblaze/translate.c
+1 -1
@@ -692,7 +692,7 @@ static void gen_alignment_check_ea(DisasContext *dc, TCGv_i64 ea, int rb,
692 record_unaligned_ess(dc, rd, size, store);
693
694 tcg_gen_brcondi_i64(TCG_COND_TSTEQ, ea, (1 << size) - 1, over);
695 - gen_helper_unaligned_access(tcg_env, ea);
695 + gen_helper_microblaze_unaligned_access(tcg_env, ea);
696 gen_set_label(over);
697 }
698 }