target/arm: Move tile_vslice_{index, offset} to vec_internal.h
Move in preparation for being used outside sme_helper.c. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20260618041517.573469-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
Jun 17, 2026 at 21:15 UTC
3d215929fad81582aa644b4b6e8d76c8b000da5c
2 files changed
+31
-33
target/arm/tcg/sme_helper.c
-33
@@ -64,39 +64,6 @@ void helper_sme_zero(CPUARMState *env, uint32_t imm, uint32_t svl)
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}
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}
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-
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-/*
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- * When considering the ZA storage as an array of elements of
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- * type T, the index within that array of the Nth element of
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- * a vertical slice of a tile can be calculated like this,
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- * regardless of the size of type T. This is because the tiles
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- * are interleaved, so if type T is size N bytes then row 1 of
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- * the tile is N rows away from row 0. The division by N to
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- * convert a byte offset into an array index and the multiplication
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- * by N to convert from vslice-index-within-the-tile to
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- * the index within the ZA storage cancel out.
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- */
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-#define tile_vslice_index(i) ((i) * sizeof(ARMVectorReg))
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-
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-/*
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- * When doing byte arithmetic on the ZA storage, the element
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- * byteoff bytes away in a tile vertical slice is always this
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- * many bytes away in the ZA storage, regardless of the
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- * size of the tile element, assuming that byteoff is a multiple
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- * of the element size. Again this is because of the interleaving
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- * of the tiles. For instance if we have 1 byte per element then
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- * each row of the ZA storage has one byte of the vslice data,
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- * and (counting from 0) byte 8 goes in row 8 of the storage
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- * at offset (8 * row-size-in-bytes).
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- * If we have 8 bytes per element then each row of the ZA storage
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- * has 8 bytes of the data, but there are 8 interleaved tiles and
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- * so byte 8 of the data goes into row 1 of the tile,
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- * which is again row 8 of the storage, so the offset is still
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- * (8 * row-size-in-bytes). Similarly for other element sizes.
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- */
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-#define tile_vslice_offset(byteoff) ((byteoff) * sizeof(ARMVectorReg))
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-
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-
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/*
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* Move Zreg vector to ZArray column.
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*/
target/arm/tcg/vec_internal.h
+31
@@ -55,6 +55,37 @@ typedef struct CPUArchState CPUARMState;
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#define H8(x) (x)
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#define H1_8(x) (x)
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+/*
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+ * When considering the ZA storage as an array of elements of
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+ * type T, the index within that array of the Nth element of
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+ * a vertical slice of a tile can be calculated like this,
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+ * regardless of the size of type T. This is because the tiles
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+ * are interleaved, so if type T is size N bytes then row 1 of
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+ * the tile is N rows away from row 0. The division by N to
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+ * convert a byte offset into an array index and the multiplication
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+ * by N to convert from vslice-index-within-the-tile to
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+ * the index within the ZA storage cancel out.
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+ */
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+#define tile_vslice_index(i) ((i) * sizeof(ARMVectorReg))
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+
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+/*
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+ * When doing byte arithmetic on the ZA storage, the element
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+ * byteoff bytes away in a tile vertical slice is always this
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+ * many bytes away in the ZA storage, regardless of the
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+ * size of the tile element, assuming that byteoff is a multiple
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+ * of the element size. Again this is because of the interleaving
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+ * of the tiles. For instance if we have 1 byte per element then
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+ * each row of the ZA storage has one byte of the vslice data,
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+ * and (counting from 0) byte 8 goes in row 8 of the storage
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+ * at offset (8 * row-size-in-bytes).
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+ * If we have 8 bytes per element then each row of the ZA storage
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+ * has 8 bytes of the data, but there are 8 interleaved tiles and
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+ * so byte 8 of the data goes into row 1 of the tile,
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+ * which is again row 8 of the storage, so the offset is still
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+ * (8 * row-size-in-bytes). Similarly for other element sizes.
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+ */
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+#define tile_vslice_offset(byteoff) ((byteoff) * sizeof(ARMVectorReg))
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+
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/*
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* Expand active predicate bits to bytes, for byte elements.
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*/