arm/gicv5: Add URL to GICv5 specification
The GICv5 specification has now been assigned its final document ID for a rev A.a spec version. This seems like a good point to add a pointer to the spec to the main source files. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Tested-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Message-id: 20260615105029.2898872-2-peter.maydell@linaro.org
Peter Maydell committed
Jun 15, 2026 at 11:50 UTC
3fcf6e1097d489d99c4c89416bd272e1a51248d8
2 files changed
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hw/intc/arm_gicv5.c
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@@ -4,6 +4,11 @@
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* Copyright (c) 2025 Linaro Limited
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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+ *
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+ * The IRS is defined in IHI 111701
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+ * (ARM Generic Interrupt Controller Architecture Specification,
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+ * GIC architecture version 5):
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+ * https://developer.arm.com/documentation/111701/latest
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*/
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#include "qemu/osdep.h"
target/arm/tcg/gicv5-cpuif.c
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@@ -4,6 +4,11 @@
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* Copyright (c) 2025 Linaro Limited
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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+ *
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+ * The cpu interface is defined in IHI 111701
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+ * (ARM Generic Interrupt Controller Architecture Specification,
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+ * GIC architecture version 5):
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+ * https://developer.arm.com/documentation/111701/latest
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*/
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#include "qemu/osdep.h"