948
static uint64_t omap_id_read(void *opaque, hwaddr addr,
949
unsigned size)
950
{
951
- struct omap_mpu_state_s *s = opaque;
952
-
951
if (size != 4) {
952
qemu_log_mask(LOG_GUEST_ERROR, "%s: read at offset 0x%" HWADDR_PRIx
953
" with bad width %d\n", __func__, addr, size);
966
return 0xcafeb574;
967
968
case 0xfffed400: /* JTAG_ID_LSB */
971
- switch (s->mpu_model) {
972
- case omap310:
973
- return 0x03310315;
974
- case omap1510:
975
- return 0x03310115;
976
- default:
977
- hw_error("%s: bad mpu model\n", __func__);
978
- }
979
- break;
969
+ return 0x03310315; /* omap310 */
970
971
case 0xfffed404: /* JTAG_ID_MSB */
982
- switch (s->mpu_model) {
983
- case omap310:
984
- return 0xfb57402f;
985
- case omap1510:
986
- return 0xfb47002f;
987
- default:
988
- hw_error("%s: bad mpu model\n", __func__);
989
- }
972
+ return 0xfb57402f; /* omap310 */
973
break;
974
}
975
1005
memory_region_init_alias(&mpu->id_iomem_ed4, NULL, "omap-id-ed4", &mpu->id_iomem,
1006
0xfffed400, 0x100);
1007
memory_region_add_subregion(memory, 0xfffed400, &mpu->id_iomem_ed4);
1025
- if (!cpu_is_omap15xx(mpu)) {
1026
- memory_region_init_alias(&mpu->id_iomem_ed4, NULL, "omap-id-e20",
1027
- &mpu->id_iomem, 0xfffe2000, 0x800);
1028
- memory_region_add_subregion(memory, 0xfffe2000, &mpu->id_iomem_e20);
1029
- }
1008
}
1009
1010
/* MPUI Control (Dummy) */
3797
MemoryRegion *system_memory = get_system_memory();
3798
3799
/* Core */
3822
- s->mpu_model = omap310;
3800
s->cpu = ARM_CPU(cpu_create(cpu_type));
3801
s->sdram_size = memory_region_size(dram);
3802
s->sram_size = OMAP15XX_SRAM_SIZE;
3951
s->wakeup, omap_findclk(s, "clk32-kHz"));
3952
3953
s->gpio = qdev_new("omap-gpio");
3977
- qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model);
3954
omap_gpio_set_clk(OMAP1_GPIO(s->gpio), omap_findclk(s, "arm_gpio_ck"));
3955
sysbus_realize_and_unref(SYS_BUS_DEVICE(s->gpio), &error_fatal);
3956
sysbus_connect_irq(SYS_BUS_DEVICE(s->gpio), 0,