target/arm: Move kvm_arm_sve_get_vls within kvm.c
Prepare to adjust the invocation point and visibility. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20260216034432.23912-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
Feb 26, 2026 at 11:27 UTC
423b0ac34ca8dd19fc27b8518b6234227ac320a5
1 file changed
+54
-54
target/arm/kvm.c
+54
-54
@@ -243,6 +243,60 @@ static int get_host_cpu_reg(int fd, ARMHostCPUFeatures *ahcf,
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return ret;
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}
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+uint32_t kvm_arm_sve_get_vls(ARMCPU *cpu)
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+{
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+ /* Only call this function if kvm_arm_sve_supported() returns true. */
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+ static uint64_t vls[KVM_ARM64_SVE_VLS_WORDS];
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+ static bool probed;
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+ uint32_t vq = 0;
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+ int i;
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+
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+ /*
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+ * KVM ensures all host CPUs support the same set of vector lengths.
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+ * So we only need to create the scratch VCPUs once and then cache
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+ * the results.
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+ */
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+ if (!probed) {
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+ struct kvm_vcpu_init init = {
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+ .target = -1,
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+ .features[0] = (1 << KVM_ARM_VCPU_SVE),
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+ };
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+ struct kvm_one_reg reg = {
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+ .id = KVM_REG_ARM64_SVE_VLS,
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+ .addr = (uint64_t)&vls[0],
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+ };
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+ int fdarray[3], ret;
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+
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+ probed = true;
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+
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+ if (!kvm_arm_create_scratch_host_vcpu(fdarray, &init)) {
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+ error_report("failed to create scratch VCPU with SVE enabled");
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+ abort();
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+ }
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+ ret = ioctl(fdarray[2], KVM_GET_ONE_REG, ®);
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+ kvm_arm_destroy_scratch_host_vcpu(fdarray);
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+ if (ret) {
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+ error_report("failed to get KVM_REG_ARM64_SVE_VLS: %s",
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+ strerror(errno));
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+ abort();
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+ }
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+
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+ for (i = KVM_ARM64_SVE_VLS_WORDS - 1; i >= 0; --i) {
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+ if (vls[i]) {
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+ vq = 64 - clz64(vls[i]) + i * 64;
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+ break;
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+ }
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+ }
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+ if (vq > ARM_MAX_VQ) {
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+ warn_report("KVM supports vector lengths larger than "
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+ "QEMU can enable");
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+ vls[0] &= MAKE_64BIT_MASK(0, ARM_MAX_VQ);
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+ }
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+ }
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+
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+ return vls[0];
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+}
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+
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static bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
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{
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/* Identify the feature bits corresponding to the host CPU, and
@@ -1914,60 +1968,6 @@ bool kvm_arm_mte_supported(void)
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QEMU_BUILD_BUG_ON(KVM_ARM64_SVE_VQ_MIN != 1);
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-uint32_t kvm_arm_sve_get_vls(ARMCPU *cpu)
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-{
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- /* Only call this function if kvm_arm_sve_supported() returns true. */
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- static uint64_t vls[KVM_ARM64_SVE_VLS_WORDS];
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- static bool probed;
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- uint32_t vq = 0;
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- int i;
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-
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- /*
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- * KVM ensures all host CPUs support the same set of vector lengths.
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- * So we only need to create the scratch VCPUs once and then cache
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- * the results.
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- */
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- if (!probed) {
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- struct kvm_vcpu_init init = {
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- .target = -1,
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- .features[0] = (1 << KVM_ARM_VCPU_SVE),
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- };
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- struct kvm_one_reg reg = {
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- .id = KVM_REG_ARM64_SVE_VLS,
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- .addr = (uint64_t)&vls[0],
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- };
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- int fdarray[3], ret;
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-
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- probed = true;
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-
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- if (!kvm_arm_create_scratch_host_vcpu(fdarray, &init)) {
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- error_report("failed to create scratch VCPU with SVE enabled");
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- abort();
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- }
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- ret = ioctl(fdarray[2], KVM_GET_ONE_REG, ®);
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- kvm_arm_destroy_scratch_host_vcpu(fdarray);
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- if (ret) {
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- error_report("failed to get KVM_REG_ARM64_SVE_VLS: %s",
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- strerror(errno));
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- abort();
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- }
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-
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- for (i = KVM_ARM64_SVE_VLS_WORDS - 1; i >= 0; --i) {
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- if (vls[i]) {
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- vq = 64 - clz64(vls[i]) + i * 64;
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- break;
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- }
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- }
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- if (vq > ARM_MAX_VQ) {
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- warn_report("KVM supports vector lengths larger than "
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- "QEMU can enable");
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- vls[0] &= MAKE_64BIT_MASK(0, ARM_MAX_VQ);
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- }
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- }
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-
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- return vls[0];
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-}
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-
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static int kvm_arm_sve_set_vls(ARMCPU *cpu)
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{
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uint64_t vls[KVM_ARM64_SVE_VLS_WORDS] = { cpu->sve_vq.map };