target/riscv: Replace target_ulong in riscv_ctr_add_entry()
Widen to 64 bits in size to hold all relevant values. Note: src and dst arguments change from signed to unsigned but no functional change is incurred. Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260520125406.28693-20-anjo@rev.ng> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Anton Johansson committed
May 20, 2026 at 14:53 UTC
42c955427d6df341d90430e5278bc03ec438a354
2 files changed
+6
-4
target/riscv/cpu.h
+3
-2
@@ -664,8 +664,9 @@ RISCVException smstateen_acc_ok(CPURISCVState *env, int index, uint64_t bit);
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void riscv_cpu_set_mode(CPURISCVState *env, privilege_mode_t newpriv,
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bool virt_en);
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-void riscv_ctr_add_entry(CPURISCVState *env, target_long src, target_long dst,
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- enum CTRType type, privilege_mode_t prev_priv, bool prev_virt);
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+void riscv_ctr_add_entry(CPURISCVState *env, uint64_t src, uint64_t dst,
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+ enum CTRType type, privilege_mode_t prev_priv,
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+ bool prev_virt);
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void riscv_ctr_clear(CPURISCVState *env);
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void riscv_translate_init(void);
target/riscv/cpu_helper.c
+3
-2
@@ -977,8 +977,9 @@ static bool riscv_ctr_check_xte(CPURISCVState *env,
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* entry = isel - CTR_ENTRIES_FIRST;
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* idx = (sctrstatus.WRPTR - entry - 1) & (depth - 1);
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*/
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-void riscv_ctr_add_entry(CPURISCVState *env, target_long src, target_long dst,
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- enum CTRType type, privilege_mode_t src_priv, bool src_virt)
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+void riscv_ctr_add_entry(CPURISCVState *env, uint64_t src, uint64_t dst,
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+ enum CTRType type, privilege_mode_t src_priv,
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+ bool src_virt)
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{
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bool tgt_virt = env->virt_enabled;
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uint64_t src_mask = riscv_ctr_priv_to_mask(src_priv, src_virt);