docs/system: add big and little endian features names
We've always supported these features but they have official feature names in the Arm ARM now so we should declare them for completeness. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260708145841.3032079-3-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alex Bennée committed
Jul 13, 2026 at 12:34 UTC
449a0403c9d37bd4d5a22ce6a79d2009662a3269
1 file changed
+4
docs/system/arm/emulation.rst
+4
@@ -31,6 +31,8 @@ the following architecture extensions:
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- FEAT_BBML1 (Translation table break-before-make level 1)
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- FEAT_BBML2 (Translation table break-before-make level 2)
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- FEAT_BF16 (AArch64 BFloat16 instructions)
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+- FEAT_BigEnd (Support for big-endian at EL1 and above)
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+- FEAT_BigEndEL0 (Support for big-endian at EL0)
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- FEAT_BTI (Branch Target Identification)
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- FEAT_CCIDX (Extended cache index)
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- FEAT_CHK (Check Feature Status)
@@ -103,6 +105,8 @@ the following architecture extensions:
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- FEAT_IDST (ID space trap handling)
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- FEAT_IESB (Implicit error synchronization event)
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- FEAT_JSCVT (JavaScript conversion instructions)
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+- FEAT_LittleEnd (Support for little-endian at EL1 and above)
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+- FEAT_LittleEndEL0 (Support for little-endian at EL0)
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- FEAT_LOR (Limited ordering regions)
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- FEAT_LPA (Large Physical Address space)
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- FEAT_LPA2 (Large Physical and virtual Address space v2)