@samitouri / QOSamiQemu / commits / 48c18cdc9c

util/cpuinfo-riscv: Detect Zbkb

RISCV_HWPROBE_EXT_ZBKB was introduced in linux 6.10 with the rest of the hwprobe api. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Richard Henderson committed Aug 10, 2026 at 11:45 UTC 48c18cdc9c9f9beadc204895a85870bddf237f2f
2 files changed +16 -2
host/include/riscv64/host/cpuinfo.h
+1
@@ -12,6 +12,7 @@
12 #define CPUINFO_ZBS (1u << 3)
13 #define CPUINFO_ZICOND (1u << 4)
14 #define CPUINFO_ZVE64X (1u << 5)
15 +#define CPUINFO_ZBKB (1u << 6)
16
17 /* Initialized with a constructor. */
18 extern unsigned cpuinfo;
util/cpuinfo-riscv.c
+15 -2
@@ -36,7 +36,7 @@ static void sigill_handler(int signo, siginfo_t *si, void *data)
36 /* Called both as constructor and (possibly) via other constructors. */
37 unsigned __attribute__((constructor)) cpuinfo_init(void)
38 {
39 - unsigned left = CPUINFO_ZBA | CPUINFO_ZBB | CPUINFO_ZBS
39 + unsigned left = CPUINFO_ZBA | CPUINFO_ZBB | CPUINFO_ZBS | CPUINFO_ZBKB
40 | CPUINFO_ZICOND | CPUINFO_ZVE64X;
41 unsigned info = cpuinfo;
42
@@ -60,6 +60,9 @@ unsigned __attribute__((constructor)) cpuinfo_init(void)
60 #if defined(__riscv_arch_test) && \
61 (defined(__riscv_vector) || defined(__riscv_zve64x))
62 info |= CPUINFO_ZVE64X;
63 +#endif
64 +#if defined(__riscv_arch_test) && defined(__riscv_zbkb)
65 + info |= CPUINFO_ZBKB;
66 #endif
67 left &= ~info;
68
@@ -76,7 +79,8 @@ unsigned __attribute__((constructor)) cpuinfo_init(void)
79 info |= pair.value & RISCV_HWPROBE_EXT_ZBA ? CPUINFO_ZBA : 0;
80 info |= pair.value & RISCV_HWPROBE_EXT_ZBB ? CPUINFO_ZBB : 0;
81 info |= pair.value & RISCV_HWPROBE_EXT_ZBS ? CPUINFO_ZBS : 0;
79 - left &= ~(CPUINFO_ZBA | CPUINFO_ZBB | CPUINFO_ZBS);
82 + info |= pair.value & RISCV_HWPROBE_EXT_ZBKB ? CPUINFO_ZBKB : 0;
83 + left &= ~(CPUINFO_ZBA | CPUINFO_ZBB | CPUINFO_ZBS | CPUINFO_ZBKB);
84 #ifdef RISCV_HWPROBE_EXT_ZICOND
85 info |= pair.value & RISCV_HWPROBE_EXT_ZICOND ? CPUINFO_ZICOND : 0;
86 left &= ~CPUINFO_ZICOND;
@@ -131,6 +135,15 @@ unsigned __attribute__((constructor)) cpuinfo_init(void)
135 left &= ~CPUINFO_ZBS;
136 }
137
138 + if (left & CPUINFO_ZBKB) {
139 + /* Probe for Zbkb: brev8 zero,zero. */
140 + got_sigill = 0;
141 + asm volatile(".insn i 0x13, 5, zero, zero, 0x687"
142 + : : : "memory");
143 + info |= got_sigill ? 0 : CPUINFO_ZBKB;
144 + left &= ~CPUINFO_ZBKB;
145 + }
146 +
147 if (left & CPUINFO_ZICOND) {
148 /* Probe for Zicond: czero.eqz zero,zero,zero. */
149 got_sigill = 0;