@samitouri / QOSamiQemu / commits / 4927bac82a

target/arm: Implement FVDOTB, FVDOTT

Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260618041517.573469-10-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Richard Henderson committed Jun 17, 2026 at 21:15 UTC 4927bac82adf083833c4c71b089b6a0a6e8e0032
4 files changed +42
target/arm/tcg/fp8_helper.c
+23
@@ -892,3 +892,26 @@ void HELPER(sme_fmopa_sb)(void *vza, void *vzn, void *vzm, void *vpn,
892 } while (row & 15);
893 }
894 }
895 +
896 +void HELPER(sme_fvdot_idx_sb)(void *vd, void *vn, void *vm,
897 + CPUARMState *env, uint32_t desc)
898 +{
899 + FP8MulContext ctx = fp8_mul_start(env, -1);
900 + intptr_t oprsz = simd_maxsz(desc);
901 + intptr_t elements = oprsz / sizeof(float32);
902 + int idx_n = extract32(desc, SIMD_DATA_SHIFT, 2);
903 + int idx_m = extract32(desc, SIMD_DATA_SHIFT + 2, 3);
904 + float32 *d = vd;
905 + uint8_t *n0 = vn;
906 + uint8_t *n1 = vn + sizeof(ARMVectorReg);
907 + uint16_t *m = vm;
908 + intptr_t i = 0;
909 +
910 + do {
911 + uint16_t mm = m[H2(2 * i + idx_m)];
912 + do {
913 + uint16_t nn = n0[H1(4 * i + idx_n)] | (n1[H1(4 * i + idx_n)] << 8);
914 + d[H4(i)] = f8dotadd_s(nn, mm, 2, d[H4(i)], &ctx);
915 + } while (++i & 3);
916 + } while (i < elements);
917 +}
target/arm/tcg/helper-fp8-defs.h
+2
@@ -40,3 +40,5 @@ DEF_HELPER_FLAGS_5(gvec_fmmla_sb, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, env, i32
40 DEF_HELPER_FLAGS_5(gvec_fmmla_hb, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, env, i32)
41
42 DEF_HELPER_FLAGS_7(sme_fmopa_sb, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, ptr, env, i32)
43 +
44 +DEF_HELPER_FLAGS_5(sme_fvdot_idx_sb, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, env, i32)
target/arm/tcg/sme.decode
+7
@@ -784,6 +784,13 @@ FMLALL_nx_b 11000001 0001 .... 1 .. 0.. ...10 00.. . @azx_4x1_i4_o1
784 FDOT_nx_b 11000001 0101 .... 0 .. 0.. ....1 11 ... @azx_2x1_i2_o3
785 FDOT_nx_b 11000001 0101 .... 1 .. 0.. ...00 01 ... @azx_4x1_i2_o3
786
787 +%idx2_10_3 10:1 3:1
788 +@azx_4x2_i2_o3 ........ .... zm:4 . .. ... .... ... off:3 \
789 + &azx_n n=4 rv=%mova_rv zn=%zn_ax2 idx=%idx2_10_3
790 +
791 +FVDOTB_sb 11000001 1101 .... 0 .. 01. ....0 0. ... @azx_4x2_i2_o3
792 +FVDOTT_sb 11000001 1101 .... 0 .. 01. ....0 1. ... @azx_4x2_i2_o3
793 +
794 ### SME2 Add / Sub array accumulators
795
796 ADD_aaz_s 11000001 101 000000 .. 111 ....0 10 ... @az_2x2_o3
target/arm/tcg/translate-sme.c
+10
@@ -1233,6 +1233,16 @@ static bool do_vdot(DisasContext *s, arg_azx_n *a, gen_helper_gvec_4_ptr *fn)
1233 TRANS_FEAT(FVDOT, aa64_sme, do_vdot, a, gen_helper_sme2_fvdot_idx_h)
1234 TRANS_FEAT(BFVDOT, aa64_sme, do_vdot, a, gen_helper_sme2_bfvdot_idx)
1235
1236 +static bool do_fvdot_sb(DisasContext *s, arg_azx_n *a, bool top)
1237 +{
1238 + return do_azz_acc_fp8(s, a->n, 1, a->rv, a->off, a->zn, a->zm,
1239 + (2 * a->idx + top) << 2, 0, false,
1240 + gen_helper_sme_fvdot_idx_sb);
1241 +}
1242 +
1243 +TRANS_FEAT(FVDOTB_sb, aa64_sme_f8f32, do_fvdot_sb, a, false)
1244 +TRANS_FEAT(FVDOTT_sb, aa64_sme_f8f32, do_fvdot_sb, a, true)
1245 +
1246 static bool do_fmla(DisasContext *s, arg_azz_n *a, bool multi,
1247 ARMFPStatusFlavour fpst, gen_helper_gvec_3_ptr *fn)
1248 {