linux-user/riscv: add coredump support
Define HAVE_ELF_CORE_DUMP and target_elf_gregset_t in target_elf.h, mirroring struct user_regs_struct: pc followed by x1 (ra) through x31 (t6). Implement elf_core_copy_regs() in elfload.c to populate the gregset from CPURISCVState. Without this, bprm->core_dump is NULL for RISC-V targets. When a guest signal goes unhandled, dump_core_and_abort() skips the core write and falls through to die_with_signal(), which re-raises the signal to the host. The host kernel then writes an x86-64 core file for the qemu-riscv64 process instead of a RISC-V guest core. Signed-off-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Helge Deller <deller@gmx.de>
Matt Turner committed
May 21, 2026 at 14:43 UTC
4b5e20839b1f5b983a64a0951a565562801a58c0
2 files changed
+16
linux-user/riscv/elfload.c
+9
@@ -3,6 +3,7 @@
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#include "qemu/osdep.h"
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#include "qemu.h"
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#include "loader.h"
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+#include "target_elf.h"
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const char *get_elf_cpu_model(uint32_t eflags)
@@ -10,6 +11,14 @@ const char *get_elf_cpu_model(uint32_t eflags)
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return "max";
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}
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+void elf_core_copy_regs(target_elf_gregset_t *r, const CPURISCVState *env)
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+{
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+ r->pc = tswapal(env->pc);
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+ for (int i = 0; i < 31; i++) {
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+ r->regs[i] = tswapal(env->gpr[i + 1]);
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+ }
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+}
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+
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abi_ulong get_elf_hwcap(CPUState *cs)
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{
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#define MISA_BIT(EXT) (1 << (EXT - 'A'))
linux-user/riscv/target_elf.h
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@@ -19,5 +19,12 @@
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#endif
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#define HAVE_ELF_HWCAP 1
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+#define HAVE_ELF_CORE_DUMP 1
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+
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+/* Mirrors struct user_regs_struct: pc followed by x1 (ra) .. x31 (t6). */
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+typedef struct target_elf_gregset_t {
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+ abi_ulong pc;
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+ abi_ulong regs[31];
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+} target_elf_gregset_t;
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#endif