@samitouri / QOSamiQemu / commits / 4b998857a9

hw/acpi/ich9.c: convert object props in ICH9_LPC_DEVICE to class props

ACPI_PM_PROP_TCO_ENABLED, ACPI_PM_PROP_ACPI_PCIHP_BRIDGE and x-keep-pci-slot-hpc properties can be converted to use object_class_property_add_bool_ptr(). Remove the now unused ich9_pm_add_properties() function. Signed-off-by: Mark Cave-Ayland <mark.caveayland@nutanix.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20260825134320.1039012-12-mark.caveayland@nutanix.com>

Mark Cave-Ayland committed Aug 25, 2026 at 14:41 UTC 4b998857a96d0c26fbfe1cec4548406fc895a619
3 files changed +36 -72
hw/acpi/ich9.c
+34 -68
@@ -349,46 +349,6 @@ static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, const char *name,
349 visit_type_uint32(v, name, &value, errp);
350 }
351
352 -static bool ich9_pm_get_enable_tco(Object *obj, Error **errp)
353 -{
354 - ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
355 - return s->pm.enable_tco;
356 -}
357 -
358 -static void ich9_pm_set_enable_tco(Object *obj, bool value, Error **errp)
359 -{
360 - ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
361 - s->pm.enable_tco = value;
362 -}
363 -
364 -static bool ich9_pm_get_acpi_pci_hotplug(Object *obj, Error **errp)
365 -{
366 - ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
367 -
368 - return s->pm.acpi_pci_hotplug.use_acpi_hotplug_bridge;
369 -}
370 -
371 -static void ich9_pm_set_acpi_pci_hotplug(Object *obj, bool value, Error **errp)
372 -{
373 - ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
374 -
375 - s->pm.acpi_pci_hotplug.use_acpi_hotplug_bridge = value;
376 -}
377 -
378 -static bool ich9_pm_get_keep_pci_slot_hpc(Object *obj, Error **errp)
379 -{
380 - ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
381 -
382 - return s->pm.keep_pci_slot_hpc;
383 -}
384 -
385 -static void ich9_pm_set_keep_pci_slot_hpc(Object *obj, bool value, Error **errp)
386 -{
387 - ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
388 -
389 - s->pm.keep_pci_slot_hpc = value;
390 -}
391 -
352 void ich9_pm_reset_properties(ICH9LPCPMRegs *pm)
353 {
354 pm->acpi_memory_hotplug.is_enabled = true;
@@ -400,35 +360,10 @@ void ich9_pm_reset_properties(ICH9LPCPMRegs *pm)
360 pm->enable_tco = true;
361 }
362
403 -void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm)
404 -{
405 - object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
406 - &pm->pm_io_base, OBJ_PROP_FLAG_READ);
407 - object_property_add_link(obj, "bus", TYPE_PCI_BUS,
408 - (Object **)&pm->acpi_pci_hotplug.root,
409 - object_property_allow_set_link,
410 - OBJ_PROP_LINK_STRONG);
411 - object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32",
412 - ich9_pm_get_gpe0_blk,
413 - NULL, NULL, NULL);
414 - object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S3_DISABLED,
415 - &pm->disable_s3, OBJ_PROP_FLAG_READWRITE);
416 - object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_DISABLED,
417 - &pm->disable_s4, OBJ_PROP_FLAG_READWRITE);
418 - object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_VAL,
419 - &pm->s4_val, OBJ_PROP_FLAG_READWRITE);
420 - object_property_add_bool(obj, ACPI_PM_PROP_TCO_ENABLED,
421 - ich9_pm_get_enable_tco,
422 - ich9_pm_set_enable_tco);
423 - object_property_add_bool(obj, ACPI_PM_PROP_ACPI_PCIHP_BRIDGE,
424 - ich9_pm_get_acpi_pci_hotplug,
425 - ich9_pm_set_acpi_pci_hotplug);
426 - object_property_add_bool(obj, "x-keep-pci-slot-hpc",
427 - ich9_pm_get_keep_pci_slot_hpc,
428 - ich9_pm_set_keep_pci_slot_hpc);
429 -}
363 +#define PM_REG_FIELD(n) \
364 + (pm_offset + offsetof(ICH9LPCPMRegs, n))
365
431 -void ich9_pm_add_class_properties(ObjectClass *oc)
366 +void ich9_pm_add_class_properties(ObjectClass *oc, ptrdiff_t pm_offset)
367 {
368 static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN;
369
@@ -436,8 +371,39 @@ void ich9_pm_add_class_properties(ObjectClass *oc)
371 ACPI_PM_PROP_GPE0_BLK_LEN,
372 &gpe0_len,
373 OBJ_PROP_FLAG_READ);
374 + object_class_property_add_uint32_ptr(oc, ACPI_PM_PROP_PM_IO_BASE,
375 + PM_REG_FIELD(pm_io_base),
376 + OBJ_PROP_FLAG_READ);
377 + object_class_property_add_link(oc, "bus",
378 + TYPE_PCI_BUS,
379 + PM_REG_FIELD(acpi_pci_hotplug.root),
380 + object_property_allow_set_link,
381 + OBJ_PROP_LINK_STRONG);
382 + object_class_property_add(oc, ACPI_PM_PROP_GPE0_BLK, "uint32",
383 + ich9_pm_get_gpe0_blk,
384 + NULL, NULL, NULL);
385 + object_class_property_add_uint8_ptr(oc, ACPI_PM_PROP_S3_DISABLED,
386 + PM_REG_FIELD(disable_s3),
387 + OBJ_PROP_FLAG_READWRITE);
388 + object_class_property_add_uint8_ptr(oc, ACPI_PM_PROP_S4_DISABLED,
389 + PM_REG_FIELD(disable_s4),
390 + OBJ_PROP_FLAG_READWRITE);
391 + object_class_property_add_uint8_ptr(oc, ACPI_PM_PROP_S4_VAL,
392 + PM_REG_FIELD(s4_val),
393 + OBJ_PROP_FLAG_READWRITE);
394 + object_class_property_add_bool_ptr(oc, ACPI_PM_PROP_TCO_ENABLED,
395 + PM_REG_FIELD(enable_tco),
396 + OBJ_PROP_FLAG_READWRITE);
397 + object_class_property_add_bool_ptr(oc, ACPI_PM_PROP_ACPI_PCIHP_BRIDGE,
398 + PM_REG_FIELD(acpi_pci_hotplug.use_acpi_hotplug_bridge),
399 + OBJ_PROP_FLAG_READWRITE);
400 + object_class_property_add_bool_ptr(oc, "x-keep-pci-slot-hpc",
401 + PM_REG_FIELD(keep_pci_slot_hpc),
402 + OBJ_PROP_FLAG_READWRITE);
403 }
404
405 +#undef PM_REG_FIELD
406 +
407 void ich9_pm_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
408 Error **errp)
409 {
hw/isa/lpc_ich9.c
+1 -2
@@ -689,7 +689,6 @@ static void ich9_lpc_initfn(Object *obj)
689 IOAPIC_NUM_PINS);
690
691 ich9_pm_reset_properties(&lpc->pm);
692 - ich9_pm_add_properties(obj, &lpc->pm);
692 }
693
694 static void ich9_lpc_realize(PCIDevice *d, Error **errp)
@@ -920,7 +919,7 @@ static void ich9_lpc_class_init(ObjectClass *klass, const void *data)
919 &acpi_disable_cmd,
920 OBJ_PROP_FLAG_READ);
921
923 - ich9_pm_add_class_properties(klass);
922 + ich9_pm_add_class_properties(klass, offsetof(ICH9LPCState, pm));
923 }
924
925 static const TypeInfo ich9_lpc_info = {
include/hw/acpi/ich9.h
+1 -2
@@ -83,8 +83,7 @@ extern const VMStateDescription vmstate_ich9_pm;
83
84 void ich9_pm_reset_properties(ICH9LPCPMRegs *pm);
85
86 -void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm);
87 -void ich9_pm_add_class_properties(ObjectClass *oc);
86 +void ich9_pm_add_class_properties(ObjectClass *oc, ptrdiff_t pm_offset);
87
88 void ich9_pm_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
89 Error **errp);