@samitouri / QOSamiQemu / commits / 4bdbb20240

target/arm: Implement FEAT_SSVE_AES

Enable FEAT_SVE_AES instructions in streaming mode. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260618040718.572950-8-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Richard Henderson committed Jun 17, 2026 at 21:07 UTC 4bdbb202406b7110d796f53a8220c5b5400282fd
5 files changed +20 -10
docs/system/arm/emulation.rst
+1
@@ -171,6 +171,7 @@ the following architecture extensions:
171 - FEAT_SME_F64F64 (Double-precision floating-point outer product instructions)
172 - FEAT_SME_I16I64 (16-bit to 64-bit integer widening outer product instructions)
173 - FEAT_SME_LUTv2 (Lookup table instructions with 4-bit indices and 8-bit elements)
174 +- FEAT_SSVE_AES (Streaming SVE Mode Advanced Encryption Standard and 128-bit polynomial multiply long instructions)
175 - FEAT_SSVE_FP8DOT2 (SVE2 FP8 2-way dot product to half-precision instructions in Streaming SVE mode)
176 - FEAT_SSVE_FP8DOT4 (SVE2 FP8 4-way dot product to single-precision instructions in Streaming SVE mode)
177 - FEAT_SSVE_FP8FMA (SVE2 FP8 multiply-accumulate to half-precision and single-precision instructions in Streaming SVE mode)
linux-user/aarch64/elfload.c
+1
@@ -173,6 +173,7 @@ abi_ulong get_elf_hwcap(CPUState *cs)
173 GET_FEATURE_ID(aa64_cmpbr, ARM_HWCAP_A64_CMPBR);
174 GET_FEATURE_ID(aa64_f8mm8, ARM_HWCAP_A64_F8MM8);
175 GET_FEATURE_ID(aa64_f8mm4, ARM_HWCAP_A64_F8MM4);
176 + GET_FEATURE_ID(aa64_ssve_aes, ARM_HWCAP_A64_SME_AES);
177
178 return hwcaps;
179 }
target/arm/cpu-features.h
+5
@@ -1575,6 +1575,11 @@ static inline bool isar_feature_aa64_sve_b16b16(const ARMISARegisters *id)
1575 return FIELD_EX64_IDREG(id, ID_AA64ZFR0, B16B16);
1576 }
1577
1578 +static inline bool isar_feature_aa64_ssve_aes(const ARMISARegisters *id)
1579 +{
1580 + return FIELD_EX64_IDREG(id, ID_AA64SMFR0, AES);
1581 +}
1582 +
1583 static inline bool isar_feature_aa64_ssve_f8fma(const ARMISARegisters *id)
1584 {
1585 return FIELD_EX64_IDREG(id, ID_AA64SMFR0, SF8FMA);
target/arm/tcg/cpu64.c
+1
@@ -1383,6 +1383,7 @@ void aarch64_max_tcg_initfn(Object *obj)
1383 SET_IDREG(isar, ID_AA64DFR0, t);
1384
1385 t = GET_IDREG(isar, ID_AA64SMFR0);
1386 + t = FIELD_DP64(t, ID_AA64SMFR0, AES, 1); /* FEAT_SSVE_AES */
1387 t = FIELD_DP64(t, ID_AA64SMFR0, SF8DP2, 1); /* FEAT_SSVE_FP8DOT2 */
1388 t = FIELD_DP64(t, ID_AA64SMFR0, SF8DP4, 1); /* FEAT_SSVE_FP8DOT4 */
1389 t = FIELD_DP64(t, ID_AA64SMFR0, SF8FMA, 1); /* FEAT_SSVE_FP8FMA */
target/arm/tcg/translate-sve.c
+12 -10
@@ -7169,7 +7169,7 @@ static bool do_trans_pmull(DisasContext *s, arg_rrr_esz *a, bool sel)
7169 if (!dc_isar_feature(aa64_sve2_pmull128, s)) {
7170 return false;
7171 }
7172 - s->is_nonstreaming = true;
7172 + s->is_nonstreaming = !dc_isar_feature(aa64_ssve_aes, s);
7173 }
7174 return gen_gvec_ool_arg_zzz(s, fns[a->esz], a, sel);
7175 }
@@ -8174,15 +8174,17 @@ TRANS_FEAT(SDOT_zzzz_2s, aa64_sme2_or_sve2p1, gen_gvec_ool_arg_zzzz,
8174 TRANS_FEAT(UDOT_zzzz_2s, aa64_sme2_or_sve2p1, gen_gvec_ool_arg_zzzz,
8175 gen_helper_gvec_udot_2h, a, 0)
8176
8177 -TRANS_FEAT_NONSTREAMING(AESMC, aa64_sve_aes, gen_gvec_ool_zz,
8178 - gen_helper_crypto_aesmc, a->rd, a->rd, 0)
8179 -TRANS_FEAT_NONSTREAMING(AESIMC, aa64_sve_aes, gen_gvec_ool_zz,
8180 - gen_helper_crypto_aesimc, a->rd, a->rd, 0)
8181 -
8182 -TRANS_FEAT_NONSTREAMING(AESE, aa64_sve_aes, gen_gvec_ool_arg_zzz,
8183 - gen_helper_crypto_aese, a, 0)
8184 -TRANS_FEAT_NONSTREAMING(AESD, aa64_sve_aes, gen_gvec_ool_arg_zzz,
8185 - gen_helper_crypto_aesd, a, 0)
8177 +TRANS_FEAT_STREAMING_IF(AESMC, aa64_sve_aes, aa64_ssve_aes,
8178 + gen_gvec_ool_zz, gen_helper_crypto_aesmc,
8179 + a->rd, a->rd, 0)
8180 +TRANS_FEAT_STREAMING_IF(AESIMC, aa64_sve_aes, aa64_ssve_aes,
8181 + gen_gvec_ool_zz, gen_helper_crypto_aesimc,
8182 + a->rd, a->rd, 0)
8183 +
8184 +TRANS_FEAT_STREAMING_IF(AESE, aa64_sve_aes, aa64_ssve_aes,
8185 + gen_gvec_ool_arg_zzz, gen_helper_crypto_aese, a, 0)
8186 +TRANS_FEAT_STREAMING_IF(AESD, aa64_sve_aes, aa64_ssve_aes,
8187 + gen_gvec_ool_arg_zzz, gen_helper_crypto_aesd, a, 0)
8188
8189 TRANS_FEAT_NONSTREAMING(SM4E, aa64_sve2_sm4, gen_gvec_ool_arg_zzz,
8190 gen_helper_crypto_sm4e, a, 0)