target/arm: Implement SMOP4[AS] (4-way)
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260702204314.79224-11-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
Jul 2, 2026 at 13:43 UTC
5d84977214b5feabf21c76fd6cec3d56f2abe82a
5 files changed
+34
target/arm/cpu-features.h
+5
@@ -1832,6 +1832,11 @@ static inline bool isar_feature_aa64_sme_mop4_f8f16(const ARMISARegisters *id)
1832
return isar_feature_aa64_sme_mop4(id) && isar_feature_aa64_sme_f8f16(id);
1833
}
1834
1835
+static inline bool isar_feature_aa64_sme_mop4_i16i64(const ARMISARegisters *id)
1836
+{
1837
+ return isar_feature_aa64_sme_mop4(id) && isar_feature_aa64_sme_i16i64(id);
1838
+}
1839
+
1840
/*
1841
* Feature tests for "does this exist in either 32-bit or 64-bit?"
1842
*/
target/arm/tcg/helper-sme-defs.h
+4
@@ -382,3 +382,7 @@ DEF_HELPER_FLAGS_5(sme_ah_fmop4s_sh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, env,
382
383
DEF_HELPER_FLAGS_4(sme_smop4a_sh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
384
DEF_HELPER_FLAGS_4(sme_smop4s_sh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
385
+DEF_HELPER_FLAGS_4(sme_smop4a_sb, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
386
+DEF_HELPER_FLAGS_4(sme_smop4s_sb, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
387
+DEF_HELPER_FLAGS_4(sme_smop4a_dh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
388
+DEF_HELPER_FLAGS_4(sme_smop4s_dh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
target/arm/tcg/sme.decode
+2
@@ -1118,3 +1118,5 @@ FMOP4A_sb 1000 0000 001. ...0 0000 00.. ..00 00.. @mop4_o2_s0
1118
FMOP4A_hb 1000 0000 001. ...0 0000 00.. ..00 100. @mop4_o1_s0
1119
1120
SMOP4_sh 1000 0000 000. ...0 1000 00.. ..0. 10.. @mop4_o2
1121
+SMOP4_sb 1000 0000 000. ...0 1000 00.. ..0. 00.. @mop4_o2
1122
+SMOP4_dh 1010 0000 110. ...0 0000 00.. ..0. 1... @mop4_o3
target/arm/tcg/sme_helper.c
+19
@@ -2954,3 +2954,22 @@ IMOP4_2WAY(smop4a_sh, +, int32_t, int16_t, int16_t)
2954
IMOP4_2WAY(smop4s_sh, -, int32_t, int16_t, int16_t)
2955
2956
#undef IMOP4_2WAY
2957
+
2958
+#define IMOP4_4WAY(NAME, OP, TYPED, TYPEN, TYPEM) \
2959
+static void inner_##NAME(void *vd, void *vn, void *vm, void *vinfo) \
2960
+{ \
2961
+ TYPEN *n = vn; TYPEM *m = vm; TYPED *d = vd; \
2962
+ *d OP##= (TYPED)n[0] * m[0] + (TYPED)n[1] * m[1] + \
2963
+ (TYPED)n[2] * m[2] + (TYPED)n[3] * m[3]; \
2964
+} \
2965
+void HELPER(sme_##NAME)(void *vza, void *vzn, void *vzm, uint32_t desc) \
2966
+{ \
2967
+ sme_mop4(vza, vzn, vzm, NULL, desc, sizeof(TYPED), inner_##NAME); \
2968
+}
2969
+
2970
+IMOP4_4WAY(smop4a_sb, +, int32_t, int8_t, int8_t)
2971
+IMOP4_4WAY(smop4s_sb, -, int32_t, int8_t, int8_t)
2972
+IMOP4_4WAY(smop4a_dh, +, int64_t, int16_t, int16_t)
2973
+IMOP4_4WAY(smop4s_dh, -, int64_t, int16_t, int16_t)
2974
+
2975
+#undef IMOP4_4WAY
target/arm/tcg/translate-sme.c
+4
@@ -2110,3 +2110,7 @@ static bool do_mop4_int(DisasContext *s, arg_mop4 *a, MemOp esz,
2110
2111
TRANS_FEAT(SMOP4_sh, aa64_sme_mop4, do_mop4_int, a, MO_32,
2112
a->s ? gen_helper_sme_smop4s_sh : gen_helper_sme_smop4a_sh)
2113
+TRANS_FEAT(SMOP4_sb, aa64_sme_mop4, do_mop4_int, a, MO_32,
2114
+ a->s ? gen_helper_sme_smop4s_sb : gen_helper_sme_smop4a_sb)
2115
+TRANS_FEAT(SMOP4_dh, aa64_sme_mop4_i16i64, do_mop4_int, a, MO_64,
2116
+ a->s ? gen_helper_sme_smop4s_dh : gen_helper_sme_smop4a_dh)