disas/riscv: Split xlrbr_opcode_data
Move the table to riscv-xlrbr-op.c.inc and massage the lines into OP() form. Drop illegal as unused. Return pointers to objects directly. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20260812223142.349142-43-richard.henderson@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Richard Henderson committed
Aug 12, 2026 at 15:31 UTC
5fa5e2df676c68def8d0284eb762f7d1ccebfd44
2 files changed
+20
-42
disas/riscv-xlrbr-op.c.inc
new
+8
@@ -0,0 +1,8 @@
1
+OP(crc32_b, "crc32.b", rv_codec_r, rv_fmt_rd_rs1)
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+OP(crc32_h, "crc32.h", rv_codec_r, rv_fmt_rd_rs1)
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+OP(crc32_w, "crc32.w", rv_codec_r, rv_fmt_rd_rs1)
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+OP(crc32_d, "crc32.d", rv_codec_r, rv_fmt_rd_rs1)
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+OP(crc32c_b, "crc32c.b", rv_codec_r, rv_fmt_rd_rs1)
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+OP(crc32c_h, "crc32c.h", rv_codec_r, rv_fmt_rd_rs1)
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+OP(crc32c_w, "crc32c.w", rv_codec_r, rv_fmt_rd_rs1)
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+OP(crc32c_d, "crc32c.d", rv_codec_r, rv_fmt_rd_rs1)
disas/riscv-xlrbr.c
+12
-42
@@ -8,38 +8,16 @@
8
*/
9
10
#include "qemu/osdep.h"
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-
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#include "disas/riscv.h"
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#include "disas/riscv-xlrbr.h"
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15
-typedef enum {
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- /* 0 is reserved for rv_op_illegal. */
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- rv_op_crc32_b = 1,
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- rv_op_crc32_h = 2,
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- rv_op_crc32_w = 3,
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- rv_op_crc32_d = 4,
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- rv_op_crc32c_b = 5,
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- rv_op_crc32c_h = 6,
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- rv_op_crc32c_w = 7,
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- rv_op_crc32c_d = 8,
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-} rv_xlrbr_op;
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-
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-static const rv_opcode_data xlrbr_opcode_data[] = {
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- { "illegal", rv_codec_illegal, rv_fmt_none },
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- { "crc32.b", rv_codec_r, rv_fmt_rd_rs1 },
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- { "crc32.h", rv_codec_r, rv_fmt_rd_rs1 },
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- { "crc32.w", rv_codec_r, rv_fmt_rd_rs1 },
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- { "crc32.d", rv_codec_r, rv_fmt_rd_rs1 },
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- { "crc32c.b", rv_codec_r, rv_fmt_rd_rs1 },
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- { "crc32c.h", rv_codec_r, rv_fmt_rd_rs1 },
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- { "crc32c.w", rv_codec_r, rv_fmt_rd_rs1 },
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- { "crc32c.d", rv_codec_r, rv_fmt_rd_rs1 },
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-};
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+#define OP(N, ...) static const rv_opcode_data op_##N = { __VA_ARGS__ };
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+#include "riscv-xlrbr-op.c.inc"
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+#undef OP
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const rv_opcode_data *decode_xlrbr(rv_decode *dec, rv_isa isa)
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{
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rv_inst inst = dec->inst;
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- rv_opcode op = rv_op_illegal;
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switch ((inst >> 0) & 0b1111111) {
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case 0b0010011:
@@ -47,34 +25,26 @@ const rv_opcode_data *decode_xlrbr(rv_decode *dec, rv_isa isa)
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case 0b001:
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switch ((inst >> 20 & 0b111111111111)) {
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case 0b011000010000:
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- op = rv_op_crc32_b;
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- break;
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+ return &op_crc32_b;
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case 0b011000010001:
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- op = rv_op_crc32_h;
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- break;
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+ return &op_crc32_h;
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case 0b011000010010:
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- op = rv_op_crc32_w;
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- break;
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+ return &op_crc32_w;
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case 0b011000010011:
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- op = rv_op_crc32_d;
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- break;
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+ return &op_crc32_d;
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case 0b011000011000:
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- op = rv_op_crc32c_b;
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- break;
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+ return &op_crc32c_b;
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case 0b011000011001:
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- op = rv_op_crc32c_h;
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- break;
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+ return &op_crc32c_h;
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case 0b011000011010:
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- op = rv_op_crc32c_w;
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- break;
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+ return &op_crc32c_w;
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case 0b011000011011:
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- op = rv_op_crc32c_d;
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- break;
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+ return &op_crc32c_d;
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}
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break;
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}
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break;
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}
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79
- return op == rv_op_illegal ? NULL : &xlrbr_opcode_data[op];
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+ return NULL;
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}