@samitouri / QOSamiQemu / commits / 5fa9e8597b

target/riscv/cpu.c: handle TCG bits of riscv_cpu_dump_state

riscv_dump_csr() is a TCG only function but we'll have to implement it at some capacity for KVM eventually, therefore put it under a CONFIG_TCG ifdef while making a note that this function is unimplemented in KVM. The csr_ops array is also TCG specific, thus the for loop inside dump_state that iterates it is also TCG only business. Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Message-ID: <20260703180538.3346781-16-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

Daniel Henrique Barboza committed Jul 3, 2026 at 15:05 UTC 5fa9e8597bb05c33f5aaa2e9c00ab65871f61253
1 file changed +4 -1
target/riscv/cpu.c
+4 -1
@@ -612,8 +612,10 @@ char *riscv_cpu_get_name(RISCVCPU *cpu)
612 return cpu_model_from_type(typename);
613 }
614
615 +/* Note: this function needs a KVM implementation. */
616 static void riscv_dump_csr(CPURISCVState *env, int csrno, FILE *f)
617 {
618 +#ifdef CONFIG_TCG
619 target_ulong val = 0;
620 RISCVException res = riscv_csrrw_debug(env, csrno, &val, 0, 0);
621
@@ -625,6 +627,7 @@ static void riscv_dump_csr(CPURISCVState *env, int csrno, FILE *f)
627 qemu_fprintf(f, " %-13s " TARGET_FMT_lx "\n",
628 csr_ops[csrno].name, val);
629 }
630 +#endif
631 }
632
633 #if !defined(CONFIG_USER_ONLY)
@@ -662,7 +665,7 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int flags)
665 }
666 #endif
667 qemu_fprintf(f, " %-13s %" PRIx64 "\n", "pc", env->pc);
665 -#ifndef CONFIG_USER_ONLY
668 +#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY)
669 for (i = 0; i < ARRAY_SIZE(csr_ops); i++) {
670 int csrno = i;
671