target/sh4: fixup tcg for sh4 fipr/ftrv instructions
Fixes TCG generation for sh4 `fipr` and `ftrv` instructions. Updates the current logic for these instructions to check the FPSCR register appropriately (according to the sh4 cpu manual, `fipr` and `ftrv` are only defined when the FPSCR register PR flag is 0). Also fixes the mth/nth-vector operands by multiplying by 4 to convert to the correct floating point register offset. Signed-off-by: Randy Schifflin <randy.schifflin@gmail.com> Reviewed-by: Yoshinori Sato <yoshinori.sato@nifty.com> Message-ID: <20260629-fixup-sh4-tcg-fpu-instructions-b4-v1-2-4356b305f971@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Randy Schifflin committed
Jun 29, 2026 at 14:49 UTC
614a52cf549e6aefa656634b4d3fa0d4686125c6
2 files changed
+6
-11
target/sh4/op_helper.c
+1
-1
@@ -488,7 +488,7 @@ void helper_ftrv(CPUSH4State *env, uint32_t n)
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float32 p;
489
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bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16;
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- bank_vector = (env->sr & FPSCR_FR) ? 16 : 0;
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+ bank_vector = (env->sr & FPSCR_FR) ? 16 + n : n;
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set_float_exception_flags(0, &env->fp_status);
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for (i = 0 ; i < 4 ; i++) {
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r[i] = float32_zero;
target/sh4/translate.c
+5
-10
@@ -377,11 +377,6 @@ static inline void gen_store_fpr64(DisasContext *ctx, TCGv_i64 t, int reg)
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goto do_illegal; \
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}
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-#define CHECK_FPSCR_PR_1 \
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- if (!(ctx->tbflags & FPSCR_PR)) { \
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- goto do_illegal; \
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- }
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-
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#define CHECK_SH4A \
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if (!(ctx->features & SH_FEATURE_SH4A)) { \
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goto do_illegal; \
@@ -1740,22 +1735,22 @@ static void _decode_opc(DisasContext * ctx)
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return;
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case 0xf0ed: /* fipr FVm,FVn */
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CHECK_FPU_ENABLED
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- CHECK_FPSCR_PR_1
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+ CHECK_FPSCR_PR_0
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{
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- TCGv m = tcg_constant_i32((ctx->opcode >> 8) & 3);
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- TCGv n = tcg_constant_i32((ctx->opcode >> 10) & 3);
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+ TCGv m = tcg_constant_i32(((ctx->opcode >> 8) & 3) << 2);
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+ TCGv n = tcg_constant_i32(((ctx->opcode >> 10) & 3) << 2);
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gen_helper_fipr(tcg_env, m, n);
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return;
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}
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break;
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case 0xf0fd: /* ftrv XMTRX,FVn */
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CHECK_FPU_ENABLED
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- CHECK_FPSCR_PR_1
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+ CHECK_FPSCR_PR_0
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{
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if ((ctx->opcode & 0x0300) != 0x0100) {
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goto do_illegal;
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}
1758
- TCGv n = tcg_constant_i32((ctx->opcode >> 10) & 3);
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+ TCGv n = tcg_constant_i32(((ctx->opcode >> 10) & 3) << 2);
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gen_helper_ftrv(tcg_env, n);
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return;
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}