hw/riscv/sifive_u.c: use intc_phandle in plic creation
The info about intc_phandles for each CPU is already stored in the intc_phandles array. We don't need to fetch them again using qemu_fdt_get_phandle(). Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260616235939.1358663-3-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Daniel Henrique Barboza committed
Jun 16, 2026 at 20:59 UTC
64d98e0797c821da99894517215539dea2ade7cd
1 file changed
+3
-7
hw/riscv/sifive_u.c
+3
-7
@@ -199,20 +199,16 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap,
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plic_phandle = phandle++;
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cells = g_new0(uint32_t, ms->smp.cpus * 4 - 2);
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for (cpu = 0; cpu < ms->smp.cpus; cpu++) {
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- nodename =
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- g_strdup_printf("/cpus/cpu@%d/interrupt-controller", cpu);
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- uint32_t intc_phandle = qemu_fdt_get_phandle(fdt, nodename);
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/* cpu 0 is the management hart that does not have S-mode */
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if (cpu == 0) {
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- cells[0] = cpu_to_be32(intc_phandle);
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+ cells[0] = cpu_to_be32(intc_phandles[cpu]);
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cells[1] = cpu_to_be32(IRQ_M_EXT);
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} else {
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- cells[cpu * 4 - 2] = cpu_to_be32(intc_phandle);
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+ cells[cpu * 4 - 2] = cpu_to_be32(intc_phandles[cpu]);
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cells[cpu * 4 - 1] = cpu_to_be32(IRQ_M_EXT);
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- cells[cpu * 4 + 0] = cpu_to_be32(intc_phandle);
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+ cells[cpu * 4 + 0] = cpu_to_be32(intc_phandles[cpu]);
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cells[cpu * 4 + 1] = cpu_to_be32(IRQ_S_EXT);
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}
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- g_free(nodename);
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}
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nodename = g_strdup_printf("/soc/interrupt-controller@%lx",
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(long)memmap[SIFIVE_U_DEV_PLIC].base);