target/loongarch: Use sys_state in file arch_dump.c when accessing CSR registers
When accessing CSR registers in file arch_dump.c, use sys_state rather than env. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@mailo.com> Tested-by: Song Gao <gaosong@loongson.cn> Message-ID: <20260605082552.175336-5-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao committed
Jun 5, 2026 at 16:25 UTC
6575246d694b15a825d69e6c4b8a5d3ebda1183f
5 files changed
+17
-9
hw/intc/loongarch_dintc.c
+3
-1
@@ -35,10 +35,12 @@ static void do_set_vcpu_dintc_irq(CPUState *cs, run_on_cpu_data data)
35
{
36
int irq = data.host_int;
37
CPULoongArchState *env;
38
+ CPUSysState *sys;
39
40
env = &LOONGARCH_CPU(cs)->env;
41
+ sys = env_sys(env);
42
cpu_synchronize_state(cs);
41
- set_bit(irq, (unsigned long *)&env->CSR_MSGIS);
43
+ set_bit(irq, (unsigned long *)&sys->CSR_MSGIS);
44
}
45
46
static void loongarch_dintc_mem_write(void *opaque, hwaddr addr,
target/loongarch/arch_dump.c
+3
-2
@@ -116,6 +116,7 @@ int loongarch_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
116
{
117
struct loongarch_note note;
118
CPULoongArchState *env = &LOONGARCH_CPU(cs)->env;
119
+ CPUSysState *sys = env_sys(env);
120
int ret, i;
121
122
loongarch_note_init(¬e, s, "CORE", 5, NT_PRSTATUS,
@@ -126,8 +127,8 @@ int loongarch_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
127
for (i = 0; i < 32; ++i) {
128
note.prstatus.pr_reg.gpr[i] = cpu_to_dump64(s, env->gpr[i]);
129
}
129
- note.prstatus.pr_reg.csr_era = cpu_to_dump64(s, env->CSR_ERA);
130
- note.prstatus.pr_reg.csr_badv = cpu_to_dump64(s, env->CSR_BADV);
130
+ note.prstatus.pr_reg.csr_era = cpu_to_dump64(s, sys->CSR_ERA);
131
+ note.prstatus.pr_reg.csr_badv = cpu_to_dump64(s, sys->CSR_BADV);
132
ret = f(¬e, LOONGARCH_PRSTATUS_NOTE_SIZE, s);
133
if (ret < 0) {
134
return -1;
target/loongarch/cpu-mmu.h
+3
-1
@@ -32,7 +32,9 @@ typedef struct MMUContext {
32
33
static inline bool cpu_has_ptw(CPULoongArchState *env)
34
{
35
- return !!FIELD_EX64(env->CSR_PWCH, CSR_PWCH, HPTW_EN);
35
+ CPUSysState *sys = env_sys(env);
36
+
37
+ return !!FIELD_EX64(sys->CSR_PWCH, CSR_PWCH, HPTW_EN);
38
}
39
40
static inline bool pte_present(CPULoongArchState *env, uint64_t entry)
target/loongarch/gdbstub.c
+2
-1
@@ -34,6 +34,7 @@ void write_fcc(CPULoongArchState *env, uint64_t val)
34
int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
35
{
36
CPULoongArchState *env = cpu_env(cs);
37
+ CPUSysState *sys = env_sys(env);
38
39
if (0 <= n && n <= 34) {
40
uint64_t val;
@@ -46,7 +47,7 @@ int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
47
} else if (n == 33) {
48
val = env->pc;
49
} else /* if (n == 34) */ {
49
- val = env->CSR_BADV;
50
+ val = sys->CSR_BADV;
51
}
52
53
if (is_la64(env)) {
target/loongarch/tcg/constant_timer.c
+6
-4
@@ -34,9 +34,10 @@ void cpu_loongarch_store_constant_timer_config(LoongArchCPU *cpu,
34
uint64_t value)
35
{
36
CPULoongArchState *env = &cpu->env;
37
+ CPUSysState *sys = env_sys(env);
38
uint64_t now, next;
39
39
- env->CSR_TCFG = value;
40
+ sys->CSR_TCFG = value;
41
if (value & CONSTANT_TIMER_ENABLE) {
42
now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
43
next = now + (value & CONSTANT_TIMER_TICK_MASK) * TIMER_PERIOD;
@@ -50,14 +51,15 @@ void loongarch_constant_timer_cb(void *opaque)
51
{
52
LoongArchCPU *cpu = opaque;
53
CPULoongArchState *env = &cpu->env;
54
+ CPUSysState *sys = env_sys(env);
55
uint64_t now, next;
56
55
- if (FIELD_EX64(env->CSR_TCFG, CSR_TCFG, PERIODIC)) {
57
+ if (FIELD_EX64(sys->CSR_TCFG, CSR_TCFG, PERIODIC)) {
58
now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
57
- next = now + (env->CSR_TCFG & CONSTANT_TIMER_TICK_MASK) * TIMER_PERIOD;
59
+ next = now + (sys->CSR_TCFG & CONSTANT_TIMER_TICK_MASK) * TIMER_PERIOD;
60
timer_mod(&cpu->timer, next);
61
} else {
60
- env->CSR_TCFG = FIELD_DP64(env->CSR_TCFG, CSR_TCFG, EN, 0);
62
+ sys->CSR_TCFG = FIELD_DP64(sys->CSR_TCFG, CSR_TCFG, EN, 0);
63
}
64
65
loongarch_cpu_set_irq(opaque, IRQ_TIMER, 1);