target/riscv: Add the implied rule for G extension
Add the missing implied rule from G to imafd_zicsr_zifencei. We can also remove the auto-enables in riscv_cpu_validate_g() as IMAFD, Zicsr, Zifencei extensions can be enabled by the implied rule. Signed-off-by: Jim Shu <jim.shu@sifive.com> Reviewed-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260528054213.678458-2-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Jim Shu committed
May 28, 2026 at 13:42 UTC
65dbf4bfd22e04c7b9f716545f19553d1a810671
2 files changed
+17
-18
target/riscv/cpu.c
+13
-1
@@ -2095,6 +2095,18 @@ static RISCVCPUImpliedExtsRule RVV_IMPLIED = {
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},
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};
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+static RISCVCPUImpliedExtsRule RVG_IMPLIED = {
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+ .is_misa = true,
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+ .ext = RVG,
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+ .implied_misa_exts = RVI | RVM | RVA | RVF | RVD,
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+ .implied_multi_exts = {
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+ CPU_CFG_OFFSET(ext_zicsr),
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+ CPU_CFG_OFFSET(ext_zifencei),
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+
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+ RISCV_IMPLIED_EXTS_RULE_END
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+ },
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+};
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+
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static RISCVCPUImpliedExtsRule ZCB_IMPLIED = {
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.ext = CPU_CFG_OFFSET(ext_zcb),
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.implied_multi_exts = {
@@ -2502,7 +2514,7 @@ static RISCVCPUImpliedExtsRule ZVFBFA_IMPLIED = {
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RISCVCPUImpliedExtsRule *riscv_misa_ext_implied_rules[] = {
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&RVA_IMPLIED, &RVD_IMPLIED, &RVF_IMPLIED,
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- &RVM_IMPLIED, &RVV_IMPLIED, NULL
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+ &RVM_IMPLIED, &RVV_IMPLIED, &RVG_IMPLIED, NULL
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};
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RISCVCPUImpliedExtsRule *riscv_multi_ext_implied_rules[] = {
target/riscv/tcg/tcg-cpu.c
+4
-17
@@ -498,30 +498,17 @@ static void riscv_cpu_validate_g(RISCVCPU *cpu)
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continue;
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}
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- if (!cpu_misa_ext_is_user_set(bit)) {
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- riscv_cpu_write_misa_bit(cpu, bit, true);
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- continue;
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- }
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-
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if (send_warn) {
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warn_report(warn_msg, riscv_get_misa_ext_name(bit));
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}
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}
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- if (!cpu->cfg.ext_zicsr) {
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- if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zicsr))) {
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- cpu->cfg.ext_zicsr = true;
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- } else if (send_warn) {
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- warn_report(warn_msg, "zicsr");
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- }
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+ if (!cpu->cfg.ext_zicsr && send_warn) {
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+ warn_report(warn_msg, "zicsr");
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}
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- if (!cpu->cfg.ext_zifencei) {
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- if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zifencei))) {
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- cpu->cfg.ext_zifencei = true;
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- } else if (send_warn) {
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- warn_report(warn_msg, "zifencei");
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- }
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+ if (!cpu->cfg.ext_zifencei && send_warn) {
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+ warn_report(warn_msg, "zifencei");
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}
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}
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