target/arm: Enable FEAT_FAMINMAX for -cpu max
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260522220306.235200-6-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
May 22, 2026 at 15:02 UTC
697910f67f53537ab3cbf1799be9226d559bb385
3 files changed
+6
docs/system/arm/emulation.rst
+1
@@ -68,6 +68,7 @@ the following architecture extensions:
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- FEAT_EVT (Enhanced Virtualization Traps)
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- FEAT_F32MM (Single-precision Matrix Multiplication)
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- FEAT_F64MM (Double-precision Matrix Multiplication)
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+- FEAT_FAMINMAX (Floating-point maximum and minimum absolute value instructions)
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- FEAT_FCMA (Floating-point complex number instructions)
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- FEAT_FGT (Fine-Grained Traps)
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- FEAT_FHM (Floating-point half-precision multiplication instructions)
linux-user/aarch64/elfload.c
+1
@@ -218,6 +218,7 @@ abi_ulong get_elf_hwcap2(CPUState *cs)
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GET_FEATURE_ID(aa64_sve_b16b16, ARM_HWCAP2_A64_SVE_B16B16);
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GET_FEATURE_ID(aa64_cssc, ARM_HWCAP2_A64_CSSC);
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GET_FEATURE_ID(aa64_lse128, ARM_HWCAP2_A64_LSE128);
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+ GET_FEATURE_ID(aa64_faminmax, ARM_HWCAP2_A64_FAMINMAX);
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return hwcaps;
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}
target/arm/tcg/cpu64.c
+4
@@ -1266,6 +1266,10 @@ void aarch64_max_tcg_initfn(Object *obj)
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t = FIELD_DP64(t, ID_AA64ISAR2, ATS1A, 1); /* FEAT_ATS1A */
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SET_IDREG(isar, ID_AA64ISAR2, t);
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+ t = GET_IDREG(isar, ID_AA64ISAR3);
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+ t = FIELD_DP64(t, ID_AA64ISAR3, FAMINMAX, 1); /* FEAT_FAMINMAX */
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+ SET_IDREG(isar, ID_AA64ISAR3, t);
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+
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t = GET_IDREG(isar, ID_AA64PFR0);
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t = FIELD_DP64(t, ID_AA64PFR0, FP, 1); /* FEAT_FP16 */
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t = FIELD_DP64(t, ID_AA64PFR0, ADVSIMD, 1); /* FEAT_FP16 */