target/arm/tcg/translate-a64.c: use translator_ldl_end instead of arm_ldl_code
Allows to reduce scope of target/arm/tcg/arm_ldst.h to aarch32 only. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-id: 20260407222208.271838-17-pierrick.bouvier@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Pierrick Bouvier committed
Apr 23, 2026 at 10:24 UTC
6981e88addb7476cfa3532b509abfec50f75ebcf
1 file changed
+3
-3
target/arm/tcg/translate-a64.c
+3
-3
@@ -26,7 +26,6 @@
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#include "translate-a64.h"
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#include "tcg/tcg-op.h"
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#include "qemu/log.h"
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-#include "arm_ldst.h"
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#include "semihosting/semihost.h"
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#include "cpregs.h"
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@@ -10801,7 +10800,7 @@ static void aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
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if (pc & 3) {
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/*
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* PC alignment fault. This has priority over the instruction abort
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- * that we would receive from a translation fault via arm_ldl_code.
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+ * that we would receive from a translation fault via translator_ldl_end.
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* This should only be possible after an indirect branch, at the
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* start of the TB.
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*/
@@ -10813,7 +10812,8 @@ static void aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
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}
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s->pc_curr = pc;
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- insn = arm_ldl_code(env, &s->base, pc, s->sctlr_b);
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+ /* Code is always little-endian on Aarch64 */
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+ insn = translator_ldl_end(env, &s->base, pc, MO_LE);
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s->insn = insn;
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s->base.pc_next = pc + 4;
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