target/arm/ptw: Flip sense of get_phys_addr_lpae return value
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260515142541.571911-3-peter.maydell@linaro.org
Peter Maydell committed
May 15, 2026 at 15:25 UTC
6bc200ebd14014b1a2284ef192512273fd4d952f
1 file changed
+4
-4
target/arm/ptw.c
+4
-4
@@ -1842,7 +1842,7 @@ static bool lpae_block_desc_valid(ARMCPU *cpu, bool ds,
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/**
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* get_phys_addr_lpae: perform one stage of page table walk, LPAE format
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*
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- * Returns false if the translation was successful. Otherwise, phys_ptr,
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+ * Returns true if the translation was successful. Otherwise, phys_ptr,
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* attrs, prot and page_size may not be filled in, and the populated fsr
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* value provides information on why the translation aborted, in the format
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* of a long-format DFSR/IFSR fault register, with the following caveat:
@@ -2432,7 +2432,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, S1Translate *ptw,
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result->f.phys_addr = descaddr;
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result->f.lg_page_size = ctz64(page_size);
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- return false;
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+ return true;
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do_translation_fault:
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fi->type = ARMFault_Translation;
@@ -2445,7 +2445,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, S1Translate *ptw,
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fi->stage2 = regime_is_stage2(mmu_idx);
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}
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fi->s1ns = fault_s1ns(ptw->cur_space, mmu_idx);
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- return true;
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+ return false;
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}
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static bool get_phys_addr_pmsav5(CPUARMState *env,
@@ -3787,7 +3787,7 @@ static bool get_phys_addr_nogpc(CPUARMState *env, S1Translate *ptw,
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}
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if (regime_using_lpae_format(env, mmu_idx)) {
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- return get_phys_addr_lpae(env, ptw, address, access_type,
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+ return !get_phys_addr_lpae(env, ptw, address, access_type,
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memop, result, fi);
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} else if (arm_feature(env, ARM_FEATURE_V7) ||
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regime_sctlr(env, mmu_idx) & SCTLR_XP) {