target/riscv: move riscv_cpu_set_aia_ireg_rmw_cb() to riscv_imsic
riscv_imsic.c is the only caller. Having it sitting in the TCG only cpu_helper.c gets in the way of --disable-tcg for no good reason. Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260703180538.3346781-24-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Daniel Henrique Barboza committed
Jul 3, 2026 at 15:05 UTC
6dd762b415310199fa359ba1dbb1eb3dfb622d41
3 files changed
+11
-13
hw/intc/riscv_imsic.c
+11
@@ -376,6 +376,17 @@ static void riscv_imsic_reset_enter(Object *obj, ResetType type)
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}
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}
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+static void riscv_cpu_set_aia_ireg_rmw_cb(CPURISCVState *env,
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+ privilege_mode_t priv,
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+ aia_ireg_rmw_fn rmw_fn,
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+ void *rmw_fn_arg)
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+{
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+ if (priv <= PRV_M) {
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+ env->aia_ireg_rmw_cb[priv] = rmw_fn;
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+ env->aia_ireg_rmw_cb_arg[priv] = rmw_fn_arg;
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+ }
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+}
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+
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static void riscv_imsic_realize(DeviceState *dev, Error **errp)
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{
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RISCVIMSICState *imsic = RISCV_IMSIC(dev);
target/riscv/cpu.h
-3
@@ -680,9 +680,6 @@ uint64_t riscv_cpu_update_mip(CPURISCVState *env, uint64_t mask,
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void riscv_cpu_set_rnmi(RISCVCPU *cpu, uint32_t irq, bool level);
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void riscv_cpu_interrupt(CPURISCVState *env);
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#define BOOL_TO_MASK(x) (-!!(x)) /* helper for riscv_cpu_update_mip value */
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-void riscv_cpu_set_aia_ireg_rmw_cb(CPURISCVState *env, privilege_mode_t priv,
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- aia_ireg_rmw_fn rmw_fn,
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- void *rmw_fn_arg);
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RISCVException smstateen_acc_ok(CPURISCVState *env, int index, uint64_t bit);
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#endif /* !CONFIG_USER_ONLY */
target/riscv/tcg/cpu_helper.c
-10
@@ -590,16 +590,6 @@ uint64_t riscv_cpu_update_mip(CPURISCVState *env, uint64_t mask, uint64_t value)
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return old;
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}
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-void riscv_cpu_set_aia_ireg_rmw_cb(CPURISCVState *env, privilege_mode_t priv,
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- aia_ireg_rmw_fn rmw_fn,
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- void *rmw_fn_arg)
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-{
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- if (priv <= PRV_M) {
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- env->aia_ireg_rmw_cb[priv] = rmw_fn;
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- env->aia_ireg_rmw_cb_arg[priv] = rmw_fn_arg;
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- }
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-}
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-
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static void riscv_ctr_freeze(CPURISCVState *env, uint64_t freeze_mask,
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bool virt)
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{