@samitouri / QOSamiQemu / commits / 7376e4d7d2

disas/riscv: Drop always true branch pseudos

The real insns are blt, bge, bltu, bgeu. Do not include pseudos that unconditionally swap operands. That's fine for an assembler but not a disassembler. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20260812223142.349142-22-richard.henderson@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

Richard Henderson committed Aug 12, 2026 at 15:31 UTC 7376e4d7d29c7c4bf4ad552624502c92e2deac06
1 file changed +6 -26
disas/riscv.c
+6 -26
@@ -326,10 +326,6 @@ typedef enum {
326 rv_op_bgez = 295,
327 rv_op_bltz = 296,
328 rv_op_bgtz = 297,
329 - rv_op_ble = 298,
330 - rv_op_bleu = 299,
331 - rv_op_bgt = 300,
332 - rv_op_bgtu = 301,
329 rv_op_j = 302,
330 rv_op_ret = 303,
331 rv_op_jr = 304,
@@ -1062,10 +1058,6 @@ static const rvc_constraint rvcc_blez[] = { rvc_rs1_eq_x0, rvc_end };
1058 static const rvc_constraint rvcc_bgez[] = { rvc_rs2_eq_x0, rvc_end };
1059 static const rvc_constraint rvcc_bltz[] = { rvc_rs2_eq_x0, rvc_end };
1060 static const rvc_constraint rvcc_bgtz[] = { rvc_rs1_eq_x0, rvc_end };
1065 -static const rvc_constraint rvcc_ble[] = { rvc_end };
1066 -static const rvc_constraint rvcc_bleu[] = { rvc_end };
1067 -static const rvc_constraint rvcc_bgt[] = { rvc_end };
1068 -static const rvc_constraint rvcc_bgtu[] = { rvc_end };
1061 static const rvc_constraint rvcc_j[] = { rvc_rd_eq_x0, rvc_end };
1062 static const rvc_constraint rvcc_ret[] = { rvc_rd_eq_x0, rvc_rs1_eq_ra,
1063 rvc_end };
@@ -1123,24 +1115,12 @@ static const rv_comp_data rvcp_bne[] = {
1115 static const rv_comp_data rvcp_blt[] = {
1116 { rv_op_bltz, rvcc_bltz },
1117 { rv_op_bgtz, rvcc_bgtz },
1126 - { rv_op_bgt, rvcc_bgt },
1118 { rv_op_illegal, NULL }
1119 };
1120
1121 static const rv_comp_data rvcp_bge[] = {
1122 { rv_op_blez, rvcc_blez },
1123 { rv_op_bgez, rvcc_bgez },
1133 - { rv_op_ble, rvcc_ble },
1134 - { rv_op_illegal, NULL }
1135 -};
1136 -
1137 -static const rv_comp_data rvcp_bltu[] = {
1138 - { rv_op_bgtu, rvcc_bgtu },
1139 - { rv_op_illegal, NULL }
1140 -};
1141 -
1142 -static const rv_comp_data rvcp_bgeu[] = {
1143 - { rv_op_bleu, rvcc_bleu },
1124 { rv_op_illegal, NULL }
1125 };
1126
@@ -1665,8 +1645,8 @@ static const rv_opcode_data rvi_opcode_data[] = {
1645 { "bne", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bne },
1646 { "blt", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_blt },
1647 { "bge", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bge },
1668 - { "bltu", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bltu },
1669 - { "bgeu", rv_codec_sb, rv_fmt_rs1_rs2_offset, rvcp_bgeu },
1648 + { "bltu", rv_codec_sb, rv_fmt_rs1_rs2_offset },
1649 + { "bgeu", rv_codec_sb, rv_fmt_rs1_rs2_offset },
1650 { "lb", rv_codec_i, rv_fmt_rd_offset_rs1 },
1651 { "lh", rv_codec_i, rv_fmt_rd_offset_rs1 },
1652 { "lw", rv_codec_i, rv_fmt_rd_offset_rs1 },
@@ -1954,10 +1934,10 @@ static const rv_opcode_data rvi_opcode_data[] = {
1934 { "bgez", rv_codec_sb, rv_fmt_rs1_offset },
1935 { "bltz", rv_codec_sb, rv_fmt_rs1_offset },
1936 { "bgtz", rv_codec_sb, rv_fmt_rs2_offset },
1957 - { "ble", rv_codec_sb, rv_fmt_rs2_rs1_offset },
1958 - { "bleu", rv_codec_sb, rv_fmt_rs2_rs1_offset },
1959 - { "bgt", rv_codec_sb, rv_fmt_rs2_rs1_offset },
1960 - { "bgtu", rv_codec_sb, rv_fmt_rs2_rs1_offset },
1937 + { },
1938 + { },
1939 + { },
1940 + { },
1941 { "j", rv_codec_uj, rv_fmt_offset },
1942 { "ret", rv_codec_i, rv_fmt_none },
1943 { "jr", rv_codec_i, rv_fmt_rs1 },