system/memory: Constify various MemoryRegionCache arguments
Mark the MemoryRegionCache structure const when it is only accessed read-only. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20260616020359.18627-7-philmd@oss.qualcomm.com>
Philippe Mathieu-Daudé committed
Mar 19, 2026 at 13:38 UTC
77293ecc95dbf038405e71197e6d57aabfbadddc
3 files changed
+23
-20
include/system/memory_cached.h
+9
-9
@@ -51,12 +51,12 @@ struct MemoryRegionCache {
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#define SUFFIX _cached_slow
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#define ARG1 cache
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-#define ARG1_DECL MemoryRegionCache *cache
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+#define ARG1_DECL const MemoryRegionCache *cache
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#include "system/memory_ldst.h.inc"
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/* Inline fast path for direct RAM access. */
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static inline
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-uint8_t address_space_ldub_cached(MemoryRegionCache *cache, hwaddr addr,
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+uint8_t address_space_ldub_cached(const MemoryRegionCache *cache, hwaddr addr,
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MemTxAttrs attrs, MemTxResult *result)
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{
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assert(addr < cache->len);
@@ -68,7 +68,7 @@ uint8_t address_space_ldub_cached(MemoryRegionCache *cache, hwaddr addr,
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}
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static inline
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-void address_space_stb_cached(MemoryRegionCache *cache,
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+void address_space_stb_cached(const MemoryRegionCache *cache,
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hwaddr addr, uint8_t val,
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MemTxAttrs attrs, MemTxResult *result)
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{
@@ -93,7 +93,7 @@ void address_space_stb_cached(MemoryRegionCache *cache,
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#define SUFFIX _cached
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#define ARG1 cache
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-#define ARG1_DECL MemoryRegionCache *cache
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+#define ARG1_DECL const MemoryRegionCache *cache
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#include "system/memory_ldst_phys.h.inc"
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/**
@@ -145,7 +145,7 @@ static inline void address_space_cache_init_empty(MemoryRegionCache *cache)
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* address that was passed to @address_space_cache_init.
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* @access_len: The number of bytes that were written starting at @addr.
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*/
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-void address_space_cache_invalidate(MemoryRegionCache *cache,
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+void address_space_cache_invalidate(const MemoryRegionCache *cache,
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hwaddr addr,
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hwaddr access_len);
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@@ -160,9 +160,9 @@ void address_space_cache_destroy(MemoryRegionCache *cache);
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* Internal functions, part of the implementation of address_space_read_cached
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* and address_space_write_cached.
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*/
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-MemTxResult address_space_read_cached_slow(MemoryRegionCache *cache,
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+MemTxResult address_space_read_cached_slow(const MemoryRegionCache *cache,
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hwaddr addr, void *buf, hwaddr len);
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-MemTxResult address_space_write_cached_slow(MemoryRegionCache *cache,
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+MemTxResult address_space_write_cached_slow(const MemoryRegionCache *cache,
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hwaddr addr, const void *buf,
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hwaddr len);
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@@ -175,7 +175,7 @@ MemTxResult address_space_write_cached_slow(MemoryRegionCache *cache,
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* @len: length of the data transferred
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*/
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static inline MemTxResult
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-address_space_read_cached(MemoryRegionCache *cache, hwaddr addr,
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+address_space_read_cached(const MemoryRegionCache *cache, hwaddr addr,
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void *buf, hwaddr len)
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{
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assert(addr < cache->len && len <= cache->len - addr);
@@ -197,7 +197,7 @@ address_space_read_cached(MemoryRegionCache *cache, hwaddr addr,
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* @len: length of the data transferred
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*/
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static inline MemTxResult
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-address_space_write_cached(MemoryRegionCache *cache, hwaddr addr,
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+address_space_write_cached(const MemoryRegionCache *cache, hwaddr addr,
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const void *buf, hwaddr len)
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{
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assert(addr < cache->len && len <= cache->len - addr);
include/system/memory_ldst_cached.h.inc
+9
-6
@@ -24,7 +24,8 @@
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#define LD_P(size) \
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glue(glue(ld, size), glue(ENDIANNESS, _p))
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-static inline uint16_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache,
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+static inline
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+uint16_t ADDRESS_SPACE_LD_CACHED(uw)(const MemoryRegionCache *cache,
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hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
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{
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assert(addr < cache->len && 2 <= cache->len - addr);
@@ -36,7 +37,8 @@ static inline uint16_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache,
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}
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}
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-static inline uint32_t ADDRESS_SPACE_LD_CACHED(l)(MemoryRegionCache *cache,
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+static inline
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+uint32_t ADDRESS_SPACE_LD_CACHED(l)(const MemoryRegionCache *cache,
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hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
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{
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assert(addr < cache->len && 4 <= cache->len - addr);
@@ -48,7 +50,8 @@ static inline uint32_t ADDRESS_SPACE_LD_CACHED(l)(MemoryRegionCache *cache,
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}
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}
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-static inline uint64_t ADDRESS_SPACE_LD_CACHED(q)(MemoryRegionCache *cache,
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+static inline
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+uint64_t ADDRESS_SPACE_LD_CACHED(q)(const MemoryRegionCache *cache,
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hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
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{
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assert(addr < cache->len && 8 <= cache->len - addr);
@@ -71,7 +74,7 @@ static inline uint64_t ADDRESS_SPACE_LD_CACHED(q)(MemoryRegionCache *cache,
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#define ST_P(size) \
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glue(glue(st, size), glue(ENDIANNESS, _p))
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-static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache,
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+static inline void ADDRESS_SPACE_ST_CACHED(w)(const MemoryRegionCache *cache,
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hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result)
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{
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assert(addr < cache->len && 2 <= cache->len - addr);
@@ -82,7 +85,7 @@ static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache,
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}
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}
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-static inline void ADDRESS_SPACE_ST_CACHED(l)(MemoryRegionCache *cache,
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+static inline void ADDRESS_SPACE_ST_CACHED(l)(const MemoryRegionCache *cache,
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hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result)
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{
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assert(addr < cache->len && 4 <= cache->len - addr);
@@ -93,7 +96,7 @@ static inline void ADDRESS_SPACE_ST_CACHED(l)(MemoryRegionCache *cache,
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}
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}
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-static inline void ADDRESS_SPACE_ST_CACHED(q)(MemoryRegionCache *cache,
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+static inline void ADDRESS_SPACE_ST_CACHED(q)(const MemoryRegionCache *cache,
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hwaddr addr, uint64_t val, MemTxAttrs attrs, MemTxResult *result)
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{
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assert(addr < cache->len && 8 <= cache->len - addr);
system/physmem.c
+5
-5
@@ -3878,7 +3878,7 @@ int64_t address_space_cache_init(MemoryRegionCache *cache,
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return l;
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}
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-void address_space_cache_invalidate(MemoryRegionCache *cache,
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+void address_space_cache_invalidate(const MemoryRegionCache *cache,
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hwaddr addr,
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hwaddr access_len)
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{
@@ -3909,7 +3909,7 @@ void address_space_cache_destroy(MemoryRegionCache *cache)
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* address_space_cache_init.
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*/
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static inline MemoryRegion *address_space_translate_cached(
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- MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat,
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+ const MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat,
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hwaddr *plen, bool is_write, MemTxAttrs attrs)
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{
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MemoryRegionSection section;
@@ -3990,7 +3990,7 @@ static MemTxResult address_space_read_continue_cached(MemTxAttrs attrs,
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* out of line function when the target is an MMIO or IOMMU region.
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*/
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MemTxResult
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-address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr,
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+address_space_read_cached_slow(const MemoryRegionCache *cache, hwaddr addr,
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void *buf, hwaddr len)
3995
{
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hwaddr mr_addr, l;
@@ -4007,7 +4007,7 @@ address_space_read_cached_slow(MemoryRegionCache *cache, hwaddr addr,
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* out of line function when the target is an MMIO or IOMMU region.
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*/
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MemTxResult
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-address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr,
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+address_space_write_cached_slow(const MemoryRegionCache *cache, hwaddr addr,
4011
const void *buf, hwaddr len)
4012
{
4013
hwaddr mr_addr, l;
@@ -4020,7 +4020,7 @@ address_space_write_cached_slow(MemoryRegionCache *cache, hwaddr addr,
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buf, len, mr_addr, l, mr);
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}
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-#define ARG1_DECL MemoryRegionCache *cache
4023
+#define ARG1_DECL const MemoryRegionCache *cache
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#define ARG1 cache
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#define SUFFIX _cached_slow
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#define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)