@samitouri / QOSamiQemu / commits / 784768f7fa

amd_iommu: Return int from page walk status helpers

fetch_pte() returns a status code 0 on success, and (small) negative values on failure. The PTE value itself is returned via an output parameter. amdvi_get_top_pt_level_and_perms() follows the same return convention. Both functions currently return uint64_t, which means any negative error values are returned as unsigned and then converted back to int by the callers. This does not cause any issues in the current implementation, but Coverity flags the type mismatch and potential overflow. Make both helpers return int, so the type matches what the return variable is (0 on success, small negative value on failure), and also the type used by all callers to store their return values. No functional changes are intended. Fixes: a1c97c395729 ("amd_iommu: Sync shadow page tables on page invalidation") Fixes: 786550e2d38a ("amd_iommu: Follow root pointer before page walk and use 1-based levels") Reported-by: Peter Maydell <peter.maydell@linaro.org> Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Message-ID: <20260630220806.1758748-3-alejandro.j.jimenez@oracle.com>

Alejandro Jimenez committed Jun 30, 2026 at 22:08 UTC 784768f7faccf02fcf904db023cd29c790b57443
1 file changed +2 -2
hw/i386/amd_iommu.c
+2 -2
@@ -659,7 +659,7 @@ static uint64_t large_pte_page_size(uint64_t pte)
659 * - IOVA exceeds the address width supported by DTE[Mode]
660 * In all such cases a page walk must be aborted.
661 */
662 -static uint64_t amdvi_get_top_pt_level_and_perms(hwaddr address, uint64_t dte,
662 +static int amdvi_get_top_pt_level_and_perms(hwaddr address, uint64_t dte,
663 uint8_t *top_level,
664 IOMMUAccessFlags *dte_perms)
665 {
@@ -702,7 +702,7 @@ static uint64_t amdvi_get_top_pt_level_and_perms(hwaddr address, uint64_t dte,
702 * page table walk. This means that the DTE has valid data, but one of the
703 * lower level entries in the Page Table could not be read.
704 */
705 -static uint64_t fetch_pte(AMDVIAddressSpace *as, hwaddr address, uint64_t dte,
705 +static int fetch_pte(AMDVIAddressSpace *as, hwaddr address, uint64_t dte,
706 uint64_t *pte, hwaddr *page_size)
707 {
708 uint64_t pte_addr;